142 lines
2.9 KiB
C
142 lines
2.9 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright(c) 2020, Intel Corporation. All rights reserved.
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*/
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#include "intel_pxp.h"
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#include "intel_pxp_cmd.h"
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#include "intel_pxp_session.h"
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#include "gt/intel_context.h"
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#include "gt/intel_engine_pm.h"
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#include "gt/intel_gpu_commands.h"
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#include "gt/intel_ring.h"
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#include "i915_trace.h"
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/* stall until prior PXP and MFX/HCP/HUC objects are cmopleted */
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#define MFX_WAIT_PXP (MFX_WAIT | \
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MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG | \
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MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG)
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static u32 *pxp_emit_session_selection(u32 *cs, u32 idx)
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{
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*cs++ = MFX_WAIT_PXP;
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/* pxp off */
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*cs++ = MI_FLUSH_DW;
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*cs++ = 0;
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*cs++ = 0;
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/* select session */
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*cs++ = MI_SET_APPID | MI_SET_APPID_SESSION_ID(idx);
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*cs++ = MFX_WAIT_PXP;
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/* pxp on */
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*cs++ = MI_FLUSH_DW | MI_FLUSH_DW_PROTECTED_MEM_EN |
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MI_FLUSH_DW_OP_STOREDW | MI_FLUSH_DW_STORE_INDEX;
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*cs++ = I915_GEM_HWS_PXP_ADDR | MI_FLUSH_DW_USE_GTT;
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*cs++ = 0;
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*cs++ = MFX_WAIT_PXP;
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return cs;
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}
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static u32 *pxp_emit_inline_termination(u32 *cs)
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{
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/* session inline termination */
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*cs++ = CRYPTO_KEY_EXCHANGE;
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*cs++ = 0;
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return cs;
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}
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static u32 *pxp_emit_session_termination(u32 *cs, u32 idx)
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{
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cs = pxp_emit_session_selection(cs, idx);
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cs = pxp_emit_inline_termination(cs);
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return cs;
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}
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static u32 *pxp_emit_wait(u32 *cs)
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{
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/* wait for cmds to go through */
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*cs++ = MFX_WAIT_PXP;
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*cs++ = 0;
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return cs;
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}
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/*
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* if we ever need to terminate more than one session, we can submit multiple
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* selections and terminations back-to-back with a single wait at the end
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*/
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#define SELECTION_LEN 10
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#define TERMINATION_LEN 2
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#define SESSION_TERMINATION_LEN(x) ((SELECTION_LEN + TERMINATION_LEN) * (x))
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#define WAIT_LEN 2
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static void pxp_request_commit(struct i915_request *rq)
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{
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struct i915_sched_attr attr = { .priority = I915_PRIORITY_MAX };
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struct intel_timeline * const tl = i915_request_timeline(rq);
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lockdep_unpin_lock(&tl->mutex, rq->cookie);
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trace_i915_request_add(rq);
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__i915_request_commit(rq);
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__i915_request_queue(rq, &attr);
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mutex_unlock(&tl->mutex);
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}
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int intel_pxp_terminate_session(struct intel_pxp *pxp, u32 id)
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{
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struct i915_request *rq;
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struct intel_context *ce = pxp->ce;
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u32 *cs;
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int err = 0;
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if (!intel_pxp_is_enabled(pxp))
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return 0;
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rq = i915_request_create(ce);
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if (IS_ERR(rq))
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return PTR_ERR(rq);
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if (ce->engine->emit_init_breadcrumb) {
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err = ce->engine->emit_init_breadcrumb(rq);
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if (err)
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goto out_rq;
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}
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cs = intel_ring_begin(rq, SESSION_TERMINATION_LEN(1) + WAIT_LEN);
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if (IS_ERR(cs)) {
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err = PTR_ERR(cs);
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goto out_rq;
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}
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cs = pxp_emit_session_termination(cs, id);
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cs = pxp_emit_wait(cs);
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intel_ring_advance(rq, cs);
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out_rq:
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i915_request_get(rq);
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if (unlikely(err))
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i915_request_set_error_once(rq, err);
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pxp_request_commit(rq);
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if (!err && i915_request_wait(rq, 0, HZ / 5) < 0)
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err = -ETIME;
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i915_request_put(rq);
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return err;
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}
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