101 lines
4.0 KiB
C
101 lines
4.0 KiB
C
/*
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* arch/arm/plat-omap/include/mach/omap34xx.h
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*
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* This file contains the processor specific definitions of the TI OMAP34XX.
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*
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* Copyright (C) 2007 Texas Instruments.
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* Copyright (C) 2007 Nokia Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_ARCH_OMAP34XX_H
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#define __ASM_ARCH_OMAP34XX_H
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/*
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* Please place only base defines here and put the rest in device
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* specific headers.
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*/
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#define L4_34XX_BASE 0x48000000
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#define L4_WK_34XX_BASE 0x48300000
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#define L4_WK_OMAP_BASE L4_WK_34XX_BASE
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#define L4_PER_34XX_BASE 0x49000000
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#define L4_PER_OMAP_BASE L4_PER_34XX_BASE
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#define L4_EMU_34XX_BASE 0x54000000
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#define L4_EMU_BASE L4_EMU_34XX_BASE
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#define L3_34XX_BASE 0x68000000
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#define L3_OMAP_BASE L3_34XX_BASE
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#define OMAP3430_32KSYNCT_BASE 0x48320000
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#define OMAP3430_CM_BASE 0x48004800
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#define OMAP3430_PRM_BASE 0x48306800
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#define OMAP343X_SMS_BASE 0x6C000000
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#define OMAP343X_SDRC_BASE 0x6D000000
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#define OMAP34XX_GPMC_BASE 0x6E000000
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#define OMAP343X_SCM_BASE 0x48002000
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#define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE
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#define OMAP34XX_IC_BASE 0x48200000
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#define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000)
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#define OMAP3430_ISP_CBUFF_BASE (OMAP3430_ISP_BASE + 0x0100)
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#define OMAP3430_ISP_CCP2_BASE (OMAP3430_ISP_BASE + 0x0400)
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#define OMAP3430_ISP_CCDC_BASE (OMAP3430_ISP_BASE + 0x0600)
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#define OMAP3430_ISP_HIST_BASE (OMAP3430_ISP_BASE + 0x0A00)
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#define OMAP3430_ISP_H3A_BASE (OMAP3430_ISP_BASE + 0x0C00)
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#define OMAP3430_ISP_PREV_BASE (OMAP3430_ISP_BASE + 0x0E00)
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#define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000)
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#define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200)
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#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400)
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#define OMAP3430_ISP_CSI2A_BASE (OMAP3430_ISP_BASE + 0x1800)
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#define OMAP3430_ISP_CSI2PHY_BASE (OMAP3430_ISP_BASE + 0x1970)
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#define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F)
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#define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077)
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#define OMAP3430_ISP_CCP2_END (OMAP3430_ISP_CCP2_BASE + 0x1EF)
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#define OMAP3430_ISP_CCDC_END (OMAP3430_ISP_CCDC_BASE + 0x0A7)
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#define OMAP3430_ISP_HIST_END (OMAP3430_ISP_HIST_BASE + 0x047)
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#define OMAP3430_ISP_H3A_END (OMAP3430_ISP_H3A_BASE + 0x05F)
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#define OMAP3430_ISP_PREV_END (OMAP3430_ISP_PREV_BASE + 0x09F)
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#define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB)
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#define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB)
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#define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F)
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#define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F)
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#define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007)
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#define OMAP34XX_IVA_INTC_BASE 0x40000000
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#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000)
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#define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000)
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#define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000)
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#define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000)
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#if defined(CONFIG_ARCH_OMAP3430)
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#define OMAP2_32KSYNCT_BASE OMAP3430_32KSYNCT_BASE
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#define OMAP2_CM_BASE OMAP3430_CM_BASE
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#define OMAP2_PRM_BASE OMAP3430_PRM_BASE
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#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE)
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#endif
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#define OMAP34XX_DSP_BASE 0x58000000
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#define OMAP34XX_DSP_MEM_BASE (OMAP34XX_DSP_BASE + 0x0)
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#define OMAP34XX_DSP_IPI_BASE (OMAP34XX_DSP_BASE + 0x1000000)
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#define OMAP34XX_DSP_MMU_BASE (OMAP34XX_DSP_BASE + 0x2000000)
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#endif /* __ASM_ARCH_OMAP34XX_H */
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