213 lines
6.0 KiB
C
213 lines
6.0 KiB
C
/*
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* BCM2835 SDHCI
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* Copyright (C) 2012 Stephen Warren
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* Based on U-Boot's MMC driver for the BCM2835 by Oleksandr Tymoshenko & me
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* Portions of the code there were obviously based on the Linux kernel at:
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* git://github.com/raspberrypi/linux.git rpi-3.6.y
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* commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/mmc/host.h>
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#include "sdhci-pltfm.h"
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/*
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* 400KHz is max freq for card ID etc. Use that as min card clock. We need to
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* know the min to enable static calculation of max BCM2835_SDHCI_WRITE_DELAY.
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*/
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#define MIN_FREQ 400000
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/*
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* The Arasan has a bugette whereby it may lose the content of successive
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* writes to registers that are within two SD-card clock cycles of each other
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* (a clock domain crossing problem). It seems, however, that the data
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* register does not have this problem, which is just as well - otherwise we'd
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* have to nobble the DMA engine too.
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*
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* This should probably be dynamically calculated based on the actual card
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* frequency. However, this is the longest we'll have to wait, and doesn't
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* seem to slow access down too much, so the added complexity doesn't seem
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* worth it for now.
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*
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* 1/MIN_FREQ is (max) time per tick of eMMC clock.
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* 2/MIN_FREQ is time for two ticks.
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* Multiply by 1000000 to get uS per two ticks.
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* *1000000 for uSecs.
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* +1 for hack rounding.
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*/
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#define BCM2835_SDHCI_WRITE_DELAY (((2 * 1000000) / MIN_FREQ) + 1)
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struct bcm2835_sdhci {
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u32 shadow;
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};
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static void bcm2835_sdhci_writel(struct sdhci_host *host, u32 val, int reg)
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{
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writel(val, host->ioaddr + reg);
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udelay(BCM2835_SDHCI_WRITE_DELAY);
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}
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static inline u32 bcm2835_sdhci_readl(struct sdhci_host *host, int reg)
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{
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u32 val = readl(host->ioaddr + reg);
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if (reg == SDHCI_CAPABILITIES)
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val |= SDHCI_CAN_VDD_330;
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return val;
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}
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static void bcm2835_sdhci_writew(struct sdhci_host *host, u16 val, int reg)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct bcm2835_sdhci *bcm2835_host = pltfm_host->priv;
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u32 oldval = (reg == SDHCI_COMMAND) ? bcm2835_host->shadow :
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bcm2835_sdhci_readl(host, reg & ~3);
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u32 word_num = (reg >> 1) & 1;
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u32 word_shift = word_num * 16;
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u32 mask = 0xffff << word_shift;
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u32 newval = (oldval & ~mask) | (val << word_shift);
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if (reg == SDHCI_TRANSFER_MODE)
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bcm2835_host->shadow = newval;
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else
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bcm2835_sdhci_writel(host, newval, reg & ~3);
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}
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static u16 bcm2835_sdhci_readw(struct sdhci_host *host, int reg)
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{
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u32 val = bcm2835_sdhci_readl(host, (reg & ~3));
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u32 word_num = (reg >> 1) & 1;
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u32 word_shift = word_num * 16;
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u32 word = (val >> word_shift) & 0xffff;
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return word;
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}
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static void bcm2835_sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
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{
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u32 oldval = bcm2835_sdhci_readl(host, reg & ~3);
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u32 byte_num = reg & 3;
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u32 byte_shift = byte_num * 8;
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u32 mask = 0xff << byte_shift;
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u32 newval = (oldval & ~mask) | (val << byte_shift);
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bcm2835_sdhci_writel(host, newval, reg & ~3);
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}
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static u8 bcm2835_sdhci_readb(struct sdhci_host *host, int reg)
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{
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u32 val = bcm2835_sdhci_readl(host, (reg & ~3));
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u32 byte_num = reg & 3;
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u32 byte_shift = byte_num * 8;
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u32 byte = (val >> byte_shift) & 0xff;
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return byte;
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}
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static unsigned int bcm2835_sdhci_get_min_clock(struct sdhci_host *host)
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{
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return MIN_FREQ;
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}
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static const struct sdhci_ops bcm2835_sdhci_ops = {
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.write_l = bcm2835_sdhci_writel,
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.write_w = bcm2835_sdhci_writew,
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.write_b = bcm2835_sdhci_writeb,
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.read_l = bcm2835_sdhci_readl,
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.read_w = bcm2835_sdhci_readw,
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.read_b = bcm2835_sdhci_readb,
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.set_clock = sdhci_set_clock,
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.get_max_clock = sdhci_pltfm_clk_get_max_clock,
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.get_min_clock = bcm2835_sdhci_get_min_clock,
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.set_bus_width = sdhci_set_bus_width,
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.reset = sdhci_reset,
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.set_uhs_signaling = sdhci_set_uhs_signaling,
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};
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static const struct sdhci_pltfm_data bcm2835_sdhci_pdata = {
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.quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
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SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK,
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.ops = &bcm2835_sdhci_ops,
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};
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static int bcm2835_sdhci_probe(struct platform_device *pdev)
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{
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struct sdhci_host *host;
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struct bcm2835_sdhci *bcm2835_host;
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struct sdhci_pltfm_host *pltfm_host;
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int ret;
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host = sdhci_pltfm_init(pdev, &bcm2835_sdhci_pdata, 0);
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if (IS_ERR(host))
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return PTR_ERR(host);
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bcm2835_host = devm_kzalloc(&pdev->dev, sizeof(*bcm2835_host),
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GFP_KERNEL);
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if (!bcm2835_host) {
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dev_err(mmc_dev(host->mmc),
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"failed to allocate bcm2835_sdhci\n");
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return -ENOMEM;
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}
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pltfm_host = sdhci_priv(host);
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pltfm_host->priv = bcm2835_host;
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pltfm_host->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(pltfm_host->clk)) {
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ret = PTR_ERR(pltfm_host->clk);
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goto err;
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}
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ret = clk_prepare_enable(pltfm_host->clk);
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if (ret) {
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dev_err(&pdev->dev, "failed to enable host clk\n");
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goto err;
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}
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ret = sdhci_add_host(host);
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if (ret)
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goto err_clk;
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return 0;
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err_clk:
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clk_disable_unprepare(pltfm_host->clk);
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err:
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sdhci_pltfm_free(pdev);
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return ret;
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}
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static const struct of_device_id bcm2835_sdhci_of_match[] = {
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{ .compatible = "brcm,bcm2835-sdhci" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, bcm2835_sdhci_of_match);
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static struct platform_driver bcm2835_sdhci_driver = {
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.driver = {
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.name = "sdhci-bcm2835",
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.of_match_table = bcm2835_sdhci_of_match,
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.pm = SDHCI_PLTFM_PMOPS,
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},
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.probe = bcm2835_sdhci_probe,
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.remove = sdhci_pltfm_unregister,
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};
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module_platform_driver(bcm2835_sdhci_driver);
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MODULE_DESCRIPTION("BCM2835 SDHCI driver");
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MODULE_AUTHOR("Stephen Warren");
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MODULE_LICENSE("GPL v2");
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