130 lines
3.0 KiB
C
130 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* NCI based driver for Samsung S3FWRN5 NFC chip
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*
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* Copyright (C) 2015 Samsung Electrnoics
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* Robert Baldyga <r.baldyga@samsung.com>
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*/
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#include <linux/completion.h>
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#include <linux/firmware.h>
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#include "s3fwrn5.h"
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#include "nci.h"
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static int s3fwrn5_nci_prop_rsp(struct nci_dev *ndev, struct sk_buff *skb)
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{
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__u8 status = skb->data[0];
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nci_req_complete(ndev, status);
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return 0;
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}
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static struct nci_driver_ops s3fwrn5_nci_prop_ops[] = {
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{
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.opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
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NCI_PROP_SET_RFREG),
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.rsp = s3fwrn5_nci_prop_rsp,
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},
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{
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.opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
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NCI_PROP_START_RFREG),
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.rsp = s3fwrn5_nci_prop_rsp,
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},
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{
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.opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
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NCI_PROP_STOP_RFREG),
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.rsp = s3fwrn5_nci_prop_rsp,
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},
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{
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.opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
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NCI_PROP_FW_CFG),
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.rsp = s3fwrn5_nci_prop_rsp,
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},
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};
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void s3fwrn5_nci_get_prop_ops(struct nci_driver_ops **ops, size_t *n)
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{
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*ops = s3fwrn5_nci_prop_ops;
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*n = ARRAY_SIZE(s3fwrn5_nci_prop_ops);
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}
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#define S3FWRN5_RFREG_SECTION_SIZE 252
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int s3fwrn5_nci_rf_configure(struct s3fwrn5_info *info, const char *fw_name)
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{
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const struct firmware *fw;
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struct nci_prop_fw_cfg_cmd fw_cfg;
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struct nci_prop_set_rfreg_cmd set_rfreg;
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struct nci_prop_stop_rfreg_cmd stop_rfreg;
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u32 checksum;
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int i, len;
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int ret;
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ret = request_firmware(&fw, fw_name, &info->ndev->nfc_dev->dev);
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if (ret < 0)
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return ret;
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/* Compute rfreg checksum */
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checksum = 0;
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for (i = 0; i < fw->size; i += 4)
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checksum += *((u32 *)(fw->data+i));
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/* Set default clock configuration for external crystal */
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fw_cfg.clk_type = 0x01;
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fw_cfg.clk_speed = 0xff;
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fw_cfg.clk_req = 0xff;
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ret = nci_prop_cmd(info->ndev, NCI_PROP_FW_CFG,
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sizeof(fw_cfg), (__u8 *)&fw_cfg);
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if (ret < 0)
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goto out;
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/* Start rfreg configuration */
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dev_info(&info->ndev->nfc_dev->dev,
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"rfreg configuration update: %s\n", fw_name);
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ret = nci_prop_cmd(info->ndev, NCI_PROP_START_RFREG, 0, NULL);
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if (ret < 0) {
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dev_err(&info->ndev->nfc_dev->dev,
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"Unable to start rfreg update\n");
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goto out;
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}
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/* Update rfreg */
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set_rfreg.index = 0;
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for (i = 0; i < fw->size; i += S3FWRN5_RFREG_SECTION_SIZE) {
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len = (fw->size - i < S3FWRN5_RFREG_SECTION_SIZE) ?
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(fw->size - i) : S3FWRN5_RFREG_SECTION_SIZE;
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memcpy(set_rfreg.data, fw->data+i, len);
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ret = nci_prop_cmd(info->ndev, NCI_PROP_SET_RFREG,
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len+1, (__u8 *)&set_rfreg);
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if (ret < 0) {
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dev_err(&info->ndev->nfc_dev->dev,
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"rfreg update error (code=%d)\n", ret);
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goto out;
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}
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set_rfreg.index++;
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}
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/* Finish rfreg configuration */
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stop_rfreg.checksum = checksum & 0xffff;
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ret = nci_prop_cmd(info->ndev, NCI_PROP_STOP_RFREG,
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sizeof(stop_rfreg), (__u8 *)&stop_rfreg);
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if (ret < 0) {
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dev_err(&info->ndev->nfc_dev->dev,
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"Unable to stop rfreg update\n");
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goto out;
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}
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dev_info(&info->ndev->nfc_dev->dev,
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"rfreg configuration update: success\n");
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out:
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release_firmware(fw);
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return ret;
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}
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