655 lines
25 KiB
C
655 lines
25 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2018 Cadence Design Systems Inc.
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*
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* Author: Boris Brezillon <boris.brezillon@bootlin.com>
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*/
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#ifndef I3C_MASTER_H
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#define I3C_MASTER_H
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#include <asm/bitsperlong.h>
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#include <linux/bitops.h>
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#include <linux/i2c.h>
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#include <linux/i3c/ccc.h>
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#include <linux/i3c/device.h>
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#include <linux/rwsem.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#define I3C_HOT_JOIN_ADDR 0x2
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#define I3C_BROADCAST_ADDR 0x7e
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#define I3C_MAX_ADDR GENMASK(6, 0)
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struct i3c_master_controller;
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struct i3c_bus;
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struct i2c_device;
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struct i3c_device;
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/**
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* struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor
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* @node: node element used to insert the slot into the I2C or I3C device
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* list
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* @master: I3C master that instantiated this device. Will be used to do
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* I2C/I3C transfers
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* @master_priv: master private data assigned to the device. Can be used to
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* add master specific information
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*
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* This structure is describing common I3C/I2C dev information.
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*/
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struct i3c_i2c_dev_desc {
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struct list_head node;
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struct i3c_master_controller *master;
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void *master_priv;
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};
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#define I3C_LVR_I2C_INDEX_MASK GENMASK(7, 5)
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#define I3C_LVR_I2C_INDEX(x) ((x) << 5)
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#define I3C_LVR_I2C_FM_MODE BIT(4)
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#define I2C_MAX_ADDR GENMASK(6, 0)
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/**
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* struct i2c_dev_boardinfo - I2C device board information
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* @node: used to insert the boardinfo object in the I2C boardinfo list
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* @base: regular I2C board information
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* @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about
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* the I2C device limitations
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*
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* This structure is used to attach board-level information to an I2C device.
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* Each I2C device connected on the I3C bus should have one.
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*/
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struct i2c_dev_boardinfo {
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struct list_head node;
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struct i2c_board_info base;
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u8 lvr;
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};
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/**
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* struct i2c_dev_desc - I2C device descriptor
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* @common: common part of the I2C device descriptor
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* @boardinfo: pointer to the boardinfo attached to this I2C device
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* @dev: I2C device object registered to the I2C framework
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* @addr: I2C device address
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* @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about
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* the I2C device limitations
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*
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* Each I2C device connected on the bus will have an i2c_dev_desc.
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* This object is created by the core and later attached to the controller
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* using &struct_i3c_master_controller->ops->attach_i2c_dev().
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*
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* &struct_i2c_dev_desc is the internal representation of an I2C device
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* connected on an I3C bus. This object is also passed to all
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* &struct_i3c_master_controller_ops hooks.
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*/
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struct i2c_dev_desc {
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struct i3c_i2c_dev_desc common;
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struct i2c_client *dev;
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u16 addr;
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u8 lvr;
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};
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/**
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* struct i3c_ibi_slot - I3C IBI (In-Band Interrupt) slot
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* @work: work associated to this slot. The IBI handler will be called from
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* there
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* @dev: the I3C device that has generated this IBI
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* @len: length of the payload associated to this IBI
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* @data: payload buffer
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*
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* An IBI slot is an object pre-allocated by the controller and used when an
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* IBI comes in.
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* Every time an IBI comes in, the I3C master driver should find a free IBI
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* slot in its IBI slot pool, retrieve the IBI payload and queue the IBI using
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* i3c_master_queue_ibi().
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*
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* How IBI slots are allocated is left to the I3C master driver, though, for
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* simple kmalloc-based allocation, the generic IBI slot pool can be used.
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*/
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struct i3c_ibi_slot {
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struct work_struct work;
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struct i3c_dev_desc *dev;
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unsigned int len;
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void *data;
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};
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/**
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* struct i3c_device_ibi_info - IBI information attached to a specific device
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* @all_ibis_handled: used to be informed when no more IBIs are waiting to be
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* processed. Used by i3c_device_disable_ibi() to wait for
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* all IBIs to be dequeued
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* @pending_ibis: count the number of pending IBIs. Each pending IBI has its
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* work element queued to the controller workqueue
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* @max_payload_len: maximum payload length for an IBI coming from this device.
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* this value is specified when calling
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* i3c_device_request_ibi() and should not change at run
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* time. All messages IBIs exceeding this limit should be
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* rejected by the master
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* @num_slots: number of IBI slots reserved for this device
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* @enabled: reflect the IBI status
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* @handler: IBI handler specified at i3c_device_request_ibi() call time. This
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* handler will be called from the controller workqueue, and as such
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* is allowed to sleep (though it is recommended to process the IBI
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* as fast as possible to not stall processing of other IBIs queued
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* on the same workqueue).
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* New I3C messages can be sent from the IBI handler
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*
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* The &struct_i3c_device_ibi_info object is allocated when
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* i3c_device_request_ibi() is called and attached to a specific device. This
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* object is here to manage IBIs coming from a specific I3C device.
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*
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* Note that this structure is the generic view of the IBI management
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* infrastructure. I3C master drivers may have their own internal
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* representation which they can associate to the device using
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* controller-private data.
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*/
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struct i3c_device_ibi_info {
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struct completion all_ibis_handled;
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atomic_t pending_ibis;
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unsigned int max_payload_len;
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unsigned int num_slots;
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unsigned int enabled;
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void (*handler)(struct i3c_device *dev,
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const struct i3c_ibi_payload *payload);
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};
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/**
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* struct i3c_dev_boardinfo - I3C device board information
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* @node: used to insert the boardinfo object in the I3C boardinfo list
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* @init_dyn_addr: initial dynamic address requested by the FW. We provide no
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* guarantee that the device will end up using this address,
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* but try our best to assign this specific address to the
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* device
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* @static_addr: static address the I3C device listen on before it's been
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* assigned a dynamic address by the master. Will be used during
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* bus initialization to assign it a specific dynamic address
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* before starting DAA (Dynamic Address Assignment)
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* @pid: I3C Provisional ID exposed by the device. This is a unique identifier
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* that may be used to attach boardinfo to i3c_dev_desc when the device
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* does not have a static address
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* @of_node: optional DT node in case the device has been described in the DT
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*
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* This structure is used to attach board-level information to an I3C device.
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* Not all I3C devices connected on the bus will have a boardinfo. It's only
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* needed if you want to attach extra resources to a device or assign it a
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* specific dynamic address.
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*/
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struct i3c_dev_boardinfo {
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struct list_head node;
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u8 init_dyn_addr;
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u8 static_addr;
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u64 pid;
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struct device_node *of_node;
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};
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/**
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* struct i3c_dev_desc - I3C device descriptor
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* @common: common part of the I3C device descriptor
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* @info: I3C device information. Will be automatically filled when you create
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* your device with i3c_master_add_i3c_dev_locked()
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* @ibi_lock: lock used to protect the &struct_i3c_device->ibi
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* @ibi: IBI info attached to a device. Should be NULL until
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* i3c_device_request_ibi() is called
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* @dev: pointer to the I3C device object exposed to I3C device drivers. This
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* should never be accessed from I3C master controller drivers. Only core
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* code should manipulate it in when updating the dev <-> desc link or
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* when propagating IBI events to the driver
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* @boardinfo: pointer to the boardinfo attached to this I3C device
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*
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* Internal representation of an I3C device. This object is only used by the
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* core and passed to I3C master controller drivers when they're requested to
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* do some operations on the device.
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* The core maintains the link between the internal I3C dev descriptor and the
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* object exposed to the I3C device drivers (&struct_i3c_device).
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*/
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struct i3c_dev_desc {
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struct i3c_i2c_dev_desc common;
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struct i3c_device_info info;
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struct mutex ibi_lock;
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struct i3c_device_ibi_info *ibi;
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struct i3c_device *dev;
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const struct i3c_dev_boardinfo *boardinfo;
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};
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/**
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* struct i3c_device - I3C device object
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* @dev: device object to register the I3C dev to the device model
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* @desc: pointer to an i3c device descriptor object. This link is updated
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* every time the I3C device is rediscovered with a different dynamic
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* address assigned
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* @bus: I3C bus this device is attached to
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*
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* I3C device object exposed to I3C device drivers. The takes care of linking
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* this object to the relevant &struct_i3c_dev_desc one.
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* All I3C devs on the I3C bus are represented, including I3C masters. For each
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* of them, we have an instance of &struct i3c_device.
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*/
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struct i3c_device {
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struct device dev;
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struct i3c_dev_desc *desc;
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struct i3c_bus *bus;
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};
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/*
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* The I3C specification says the maximum number of devices connected on the
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* bus is 11, but this number depends on external parameters like trace length,
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* capacitive load per Device, and the types of Devices present on the Bus.
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* I3C master can also have limitations, so this number is just here as a
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* reference and should be adjusted on a per-controller/per-board basis.
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*/
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#define I3C_BUS_MAX_DEVS 11
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#define I3C_BUS_MAX_I3C_SCL_RATE 12900000
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#define I3C_BUS_TYP_I3C_SCL_RATE 12500000
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#define I3C_BUS_I2C_FM_PLUS_SCL_RATE 1000000
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#define I3C_BUS_I2C_FM_SCL_RATE 400000
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#define I3C_BUS_TLOW_OD_MIN_NS 200
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/**
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* enum i3c_bus_mode - I3C bus mode
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* @I3C_BUS_MODE_PURE: only I3C devices are connected to the bus. No limitation
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* expected
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* @I3C_BUS_MODE_MIXED_FAST: I2C devices with 50ns spike filter are present on
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* the bus. The only impact in this mode is that the
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* high SCL pulse has to stay below 50ns to trick I2C
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* devices when transmitting I3C frames
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* @I3C_BUS_MODE_MIXED_LIMITED: I2C devices without 50ns spike filter are
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* present on the bus. However they allow
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* compliance up to the maximum SDR SCL clock
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* frequency.
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* @I3C_BUS_MODE_MIXED_SLOW: I2C devices without 50ns spike filter are present
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* on the bus
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*/
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enum i3c_bus_mode {
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I3C_BUS_MODE_PURE,
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I3C_BUS_MODE_MIXED_FAST,
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I3C_BUS_MODE_MIXED_LIMITED,
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I3C_BUS_MODE_MIXED_SLOW,
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};
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/**
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* enum i3c_addr_slot_status - I3C address slot status
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* @I3C_ADDR_SLOT_FREE: address is free
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* @I3C_ADDR_SLOT_RSVD: address is reserved
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* @I3C_ADDR_SLOT_I2C_DEV: address is assigned to an I2C device
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* @I3C_ADDR_SLOT_I3C_DEV: address is assigned to an I3C device
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* @I3C_ADDR_SLOT_STATUS_MASK: address slot mask
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*
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* On an I3C bus, addresses are assigned dynamically, and we need to know which
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* addresses are free to use and which ones are already assigned.
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*
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* Addresses marked as reserved are those reserved by the I3C protocol
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* (broadcast address, ...).
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*/
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enum i3c_addr_slot_status {
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I3C_ADDR_SLOT_FREE,
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I3C_ADDR_SLOT_RSVD,
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I3C_ADDR_SLOT_I2C_DEV,
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I3C_ADDR_SLOT_I3C_DEV,
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I3C_ADDR_SLOT_STATUS_MASK = 3,
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};
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/**
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* struct i3c_bus - I3C bus object
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* @cur_master: I3C master currently driving the bus. Since I3C is multi-master
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* this can change over the time. Will be used to let a master
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* know whether it needs to request bus ownership before sending
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* a frame or not
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* @id: bus ID. Assigned by the framework when register the bus
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* @addrslots: a bitmap with 2-bits per-slot to encode the address status and
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* ease the DAA (Dynamic Address Assignment) procedure (see
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* &enum i3c_addr_slot_status)
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* @mode: bus mode (see &enum i3c_bus_mode)
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* @scl_rate.i3c: maximum rate for the clock signal when doing I3C SDR/priv
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* transfers
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* @scl_rate.i2c: maximum rate for the clock signal when doing I2C transfers
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* @scl_rate: SCL signal rate for I3C and I2C mode
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* @devs.i3c: contains a list of I3C device descriptors representing I3C
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* devices connected on the bus and successfully attached to the
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* I3C master
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* @devs.i2c: contains a list of I2C device descriptors representing I2C
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* devices connected on the bus and successfully attached to the
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* I3C master
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* @devs: 2 lists containing all I3C/I2C devices connected to the bus
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* @lock: read/write lock on the bus. This is needed to protect against
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* operations that have an impact on the whole bus and the devices
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* connected to it. For example, when asking slaves to drop their
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* dynamic address (RSTDAA CCC), we need to make sure no one is trying
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* to send I3C frames to these devices.
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* Note that this lock does not protect against concurrency between
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* devices: several drivers can send different I3C/I2C frames through
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* the same master in parallel. This is the responsibility of the
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* master to guarantee that frames are actually sent sequentially and
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* not interlaced
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*
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* The I3C bus is represented with its own object and not implicitly described
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* by the I3C master to cope with the multi-master functionality, where one bus
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* can be shared amongst several masters, each of them requesting bus ownership
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* when they need to.
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*/
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struct i3c_bus {
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struct i3c_dev_desc *cur_master;
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int id;
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unsigned long addrslots[((I2C_MAX_ADDR + 1) * 2) / BITS_PER_LONG];
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enum i3c_bus_mode mode;
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struct {
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unsigned long i3c;
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unsigned long i2c;
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} scl_rate;
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struct {
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struct list_head i3c;
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struct list_head i2c;
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} devs;
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struct rw_semaphore lock;
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};
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/**
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* struct i3c_master_controller_ops - I3C master methods
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* @bus_init: hook responsible for the I3C bus initialization. You should at
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* least call master_set_info() from there and set the bus mode.
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* You can also put controller specific initialization in there.
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* This method is mandatory.
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* @bus_cleanup: cleanup everything done in
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* &i3c_master_controller_ops->bus_init().
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* This method is optional.
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* @attach_i3c_dev: called every time an I3C device is attached to the bus. It
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* can be after a DAA or when a device is statically declared
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* by the FW, in which case it will only have a static address
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* and the dynamic address will be 0.
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* When this function is called, device information have not
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* been retrieved yet.
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* This is a good place to attach master controller specific
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* data to I3C devices.
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* This method is optional.
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* @reattach_i3c_dev: called every time an I3C device has its addressed
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* changed. It can be because the device has been powered
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* down and has lost its address, or it can happen when a
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* device had a static address and has been assigned a
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* dynamic address with SETDASA.
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* This method is optional.
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* @detach_i3c_dev: called when an I3C device is detached from the bus. Usually
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* happens when the master device is unregistered.
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* This method is optional.
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* @do_daa: do a DAA (Dynamic Address Assignment) procedure. This is procedure
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* should send an ENTDAA CCC command and then add all devices
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* discovered sure the DAA using i3c_master_add_i3c_dev_locked().
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* Add devices added with i3c_master_add_i3c_dev_locked() will then be
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* attached or re-attached to the controller.
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* This method is mandatory.
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* @supports_ccc_cmd: should return true if the CCC command is supported, false
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* otherwise.
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* This method is optional, if not provided the core assumes
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* all CCC commands are supported.
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* @send_ccc_cmd: send a CCC command
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* This method is mandatory.
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* @priv_xfers: do one or several private I3C SDR transfers
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* This method is mandatory.
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* @attach_i2c_dev: called every time an I2C device is attached to the bus.
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* This is a good place to attach master controller specific
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* data to I2C devices.
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* This method is optional.
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* @detach_i2c_dev: called when an I2C device is detached from the bus. Usually
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* happens when the master device is unregistered.
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* This method is optional.
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* @i2c_xfers: do one or several I2C transfers. Note that, unlike i3c
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* transfers, the core does not guarantee that buffers attached to
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* the transfers are DMA-safe. If drivers want to have DMA-safe
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* buffers, they should use the i2c_get_dma_safe_msg_buf()
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* and i2c_put_dma_safe_msg_buf() helpers provided by the I2C
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* framework.
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* This method is mandatory.
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* @request_ibi: attach an IBI handler to an I3C device. This implies defining
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* an IBI handler and the constraints of the IBI (maximum payload
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* length and number of pre-allocated slots).
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* Some controllers support less IBI-capable devices than regular
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* devices, so this method might return -%EBUSY if there's no
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* more space for an extra IBI registration
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* This method is optional.
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* @free_ibi: free an IBI previously requested with ->request_ibi(). The IBI
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* should have been disabled with ->disable_irq() prior to that
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* This method is mandatory only if ->request_ibi is not NULL.
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* @enable_ibi: enable the IBI. Only valid if ->request_ibi() has been called
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* prior to ->enable_ibi(). The controller should first enable
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* the IBI on the controller end (for example, unmask the hardware
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* IRQ) and then send the ENEC CCC command (with the IBI flag set)
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* to the I3C device.
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* This method is mandatory only if ->request_ibi is not NULL.
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* @disable_ibi: disable an IBI. First send the DISEC CCC command with the IBI
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* flag set and then deactivate the hardware IRQ on the
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* controller end.
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* This method is mandatory only if ->request_ibi is not NULL.
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* @recycle_ibi_slot: recycle an IBI slot. Called every time an IBI has been
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* processed by its handler. The IBI slot should be put back
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* in the IBI slot pool so that the controller can re-use it
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* for a future IBI
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* This method is mandatory only if ->request_ibi is not
|
|
* NULL.
|
|
*/
|
|
struct i3c_master_controller_ops {
|
|
int (*bus_init)(struct i3c_master_controller *master);
|
|
void (*bus_cleanup)(struct i3c_master_controller *master);
|
|
int (*attach_i3c_dev)(struct i3c_dev_desc *dev);
|
|
int (*reattach_i3c_dev)(struct i3c_dev_desc *dev, u8 old_dyn_addr);
|
|
void (*detach_i3c_dev)(struct i3c_dev_desc *dev);
|
|
int (*do_daa)(struct i3c_master_controller *master);
|
|
bool (*supports_ccc_cmd)(struct i3c_master_controller *master,
|
|
const struct i3c_ccc_cmd *cmd);
|
|
int (*send_ccc_cmd)(struct i3c_master_controller *master,
|
|
struct i3c_ccc_cmd *cmd);
|
|
int (*priv_xfers)(struct i3c_dev_desc *dev,
|
|
struct i3c_priv_xfer *xfers,
|
|
int nxfers);
|
|
int (*attach_i2c_dev)(struct i2c_dev_desc *dev);
|
|
void (*detach_i2c_dev)(struct i2c_dev_desc *dev);
|
|
int (*i2c_xfers)(struct i2c_dev_desc *dev,
|
|
const struct i2c_msg *xfers, int nxfers);
|
|
int (*request_ibi)(struct i3c_dev_desc *dev,
|
|
const struct i3c_ibi_setup *req);
|
|
void (*free_ibi)(struct i3c_dev_desc *dev);
|
|
int (*enable_ibi)(struct i3c_dev_desc *dev);
|
|
int (*disable_ibi)(struct i3c_dev_desc *dev);
|
|
void (*recycle_ibi_slot)(struct i3c_dev_desc *dev,
|
|
struct i3c_ibi_slot *slot);
|
|
};
|
|
|
|
/**
|
|
* struct i3c_master_controller - I3C master controller object
|
|
* @dev: device to be registered to the device-model
|
|
* @this: an I3C device object representing this master. This device will be
|
|
* added to the list of I3C devs available on the bus
|
|
* @i2c: I2C adapter used for backward compatibility. This adapter is
|
|
* registered to the I2C subsystem to be as transparent as possible to
|
|
* existing I2C drivers
|
|
* @ops: master operations. See &struct i3c_master_controller_ops
|
|
* @secondary: true if the master is a secondary master
|
|
* @init_done: true when the bus initialization is done
|
|
* @boardinfo.i3c: list of I3C boardinfo objects
|
|
* @boardinfo.i2c: list of I2C boardinfo objects
|
|
* @boardinfo: board-level information attached to devices connected on the bus
|
|
* @bus: I3C bus exposed by this master
|
|
* @wq: workqueue used to execute IBI handlers. Can also be used by master
|
|
* drivers if they need to postpone operations that need to take place
|
|
* in a thread context. Typical examples are Hot Join processing which
|
|
* requires taking the bus lock in maintenance, which in turn, can only
|
|
* be done from a sleep-able context
|
|
*
|
|
* A &struct i3c_master_controller has to be registered to the I3C subsystem
|
|
* through i3c_master_register(). None of &struct i3c_master_controller fields
|
|
* should be set manually, just pass appropriate values to
|
|
* i3c_master_register().
|
|
*/
|
|
struct i3c_master_controller {
|
|
struct device dev;
|
|
struct i3c_dev_desc *this;
|
|
struct i2c_adapter i2c;
|
|
const struct i3c_master_controller_ops *ops;
|
|
unsigned int secondary : 1;
|
|
unsigned int init_done : 1;
|
|
struct {
|
|
struct list_head i3c;
|
|
struct list_head i2c;
|
|
} boardinfo;
|
|
struct i3c_bus bus;
|
|
struct workqueue_struct *wq;
|
|
};
|
|
|
|
/**
|
|
* i3c_bus_for_each_i2cdev() - iterate over all I2C devices present on the bus
|
|
* @bus: the I3C bus
|
|
* @dev: an I2C device descriptor pointer updated to point to the current slot
|
|
* at each iteration of the loop
|
|
*
|
|
* Iterate over all I2C devs present on the bus.
|
|
*/
|
|
#define i3c_bus_for_each_i2cdev(bus, dev) \
|
|
list_for_each_entry(dev, &(bus)->devs.i2c, common.node)
|
|
|
|
/**
|
|
* i3c_bus_for_each_i3cdev() - iterate over all I3C devices present on the bus
|
|
* @bus: the I3C bus
|
|
* @dev: and I3C device descriptor pointer updated to point to the current slot
|
|
* at each iteration of the loop
|
|
*
|
|
* Iterate over all I3C devs present on the bus.
|
|
*/
|
|
#define i3c_bus_for_each_i3cdev(bus, dev) \
|
|
list_for_each_entry(dev, &(bus)->devs.i3c, common.node)
|
|
|
|
int i3c_master_do_i2c_xfers(struct i3c_master_controller *master,
|
|
const struct i2c_msg *xfers,
|
|
int nxfers);
|
|
|
|
int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
|
|
u8 evts);
|
|
int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
|
|
u8 evts);
|
|
int i3c_master_entdaa_locked(struct i3c_master_controller *master);
|
|
int i3c_master_defslvs_locked(struct i3c_master_controller *master);
|
|
|
|
int i3c_master_get_free_addr(struct i3c_master_controller *master,
|
|
u8 start_addr);
|
|
|
|
int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
|
|
u8 addr);
|
|
int i3c_master_do_daa(struct i3c_master_controller *master);
|
|
|
|
int i3c_master_set_info(struct i3c_master_controller *master,
|
|
const struct i3c_device_info *info);
|
|
|
|
int i3c_master_register(struct i3c_master_controller *master,
|
|
struct device *parent,
|
|
const struct i3c_master_controller_ops *ops,
|
|
bool secondary);
|
|
int i3c_master_unregister(struct i3c_master_controller *master);
|
|
|
|
/**
|
|
* i3c_dev_get_master_data() - get master private data attached to an I3C
|
|
* device descriptor
|
|
* @dev: the I3C device descriptor to get private data from
|
|
*
|
|
* Return: the private data previously attached with i3c_dev_set_master_data()
|
|
* or NULL if no data has been attached to the device.
|
|
*/
|
|
static inline void *i3c_dev_get_master_data(const struct i3c_dev_desc *dev)
|
|
{
|
|
return dev->common.master_priv;
|
|
}
|
|
|
|
/**
|
|
* i3c_dev_set_master_data() - attach master private data to an I3C device
|
|
* descriptor
|
|
* @dev: the I3C device descriptor to attach private data to
|
|
* @data: private data
|
|
*
|
|
* This functions allows a master controller to attach per-device private data
|
|
* which can then be retrieved with i3c_dev_get_master_data().
|
|
*/
|
|
static inline void i3c_dev_set_master_data(struct i3c_dev_desc *dev,
|
|
void *data)
|
|
{
|
|
dev->common.master_priv = data;
|
|
}
|
|
|
|
/**
|
|
* i2c_dev_get_master_data() - get master private data attached to an I2C
|
|
* device descriptor
|
|
* @dev: the I2C device descriptor to get private data from
|
|
*
|
|
* Return: the private data previously attached with i2c_dev_set_master_data()
|
|
* or NULL if no data has been attached to the device.
|
|
*/
|
|
static inline void *i2c_dev_get_master_data(const struct i2c_dev_desc *dev)
|
|
{
|
|
return dev->common.master_priv;
|
|
}
|
|
|
|
/**
|
|
* i2c_dev_set_master_data() - attach master private data to an I2C device
|
|
* descriptor
|
|
* @dev: the I2C device descriptor to attach private data to
|
|
* @data: private data
|
|
*
|
|
* This functions allows a master controller to attach per-device private data
|
|
* which can then be retrieved with i2c_device_get_master_data().
|
|
*/
|
|
static inline void i2c_dev_set_master_data(struct i2c_dev_desc *dev,
|
|
void *data)
|
|
{
|
|
dev->common.master_priv = data;
|
|
}
|
|
|
|
/**
|
|
* i3c_dev_get_master() - get master used to communicate with a device
|
|
* @dev: I3C dev
|
|
*
|
|
* Return: the master controller driving @dev
|
|
*/
|
|
static inline struct i3c_master_controller *
|
|
i3c_dev_get_master(struct i3c_dev_desc *dev)
|
|
{
|
|
return dev->common.master;
|
|
}
|
|
|
|
/**
|
|
* i2c_dev_get_master() - get master used to communicate with a device
|
|
* @dev: I2C dev
|
|
*
|
|
* Return: the master controller driving @dev
|
|
*/
|
|
static inline struct i3c_master_controller *
|
|
i2c_dev_get_master(struct i2c_dev_desc *dev)
|
|
{
|
|
return dev->common.master;
|
|
}
|
|
|
|
/**
|
|
* i3c_master_get_bus() - get the bus attached to a master
|
|
* @master: master object
|
|
*
|
|
* Return: the I3C bus @master is connected to
|
|
*/
|
|
static inline struct i3c_bus *
|
|
i3c_master_get_bus(struct i3c_master_controller *master)
|
|
{
|
|
return &master->bus;
|
|
}
|
|
|
|
struct i3c_generic_ibi_pool;
|
|
|
|
struct i3c_generic_ibi_pool *
|
|
i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
|
|
const struct i3c_ibi_setup *req);
|
|
void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool);
|
|
|
|
struct i3c_ibi_slot *
|
|
i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool);
|
|
void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
|
|
struct i3c_ibi_slot *slot);
|
|
|
|
void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot);
|
|
|
|
struct i3c_ibi_slot *i3c_master_get_free_ibi_slot(struct i3c_dev_desc *dev);
|
|
|
|
#endif /* I3C_MASTER_H */
|