Brian Norris 666b65683d mtd: brcmnand: respect ECC algorithm set by NAND subsystem ... This is more obvious than guessing based on ECC strength. It allows using NAND on devices with BCH-1 (e.g. D-Link DIR-885L). This maintains DT backward compatibility by defaulting to Hamming if a 1-bit ECC algorithm is specified without a corresponding algorithm selection. i.e., to use BCH-1, you must specify: nand-ecc-strength = <1>; nand-ecc-step-size = <512>; nand-ecc-algo = "bch"; Also adds a check to ensure we haven't allowed someone to get by with SW ECC. If we want to support SW ECC, we need to refactor some other pieces of this driver. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>		2016-05-05 23:55:15 +02:00
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Makefile	mtd: brcmnand: Add support for the BCM6368	2015-12-09 18:28:42 -08:00
bcm6368_nand.c	mtd: brcmnand: defer to devm_ioremap_resource() for error checking	2015-12-10 13:08:08 -08:00
bcm63138_nand.c	mtd: brcmnand: refactor bcm63138 SoC layering	2015-09-30 13:07:01 -07:00
brcmnand.c	mtd: brcmnand: respect ECC algorithm set by NAND subsystem	2016-05-05 23:55:15 +02:00
brcmnand.h	mtd: brcmnand: remove unnecessary fields from brcmnand_soc	2015-09-30 13:07:02 -07:00
brcmstb_nand.c	mtd: brcmnand: add support for STB chips	2015-05-15 13:16:44 -07:00
iproc_nand.c	mtd: brcmnand: refactor iProc SoC layering	2015-09-30 13:07:02 -07:00