430 lines
14 KiB
C
430 lines
14 KiB
C
/*
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* umip.c Emulation for instruction protected by the Intel User-Mode
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* Instruction Prevention feature
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*
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* Copyright (c) 2017, Intel Corporation.
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* Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
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*/
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#include <linux/uaccess.h>
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#include <asm/umip.h>
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#include <asm/traps.h>
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#include <asm/insn.h>
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#include <asm/insn-eval.h>
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#include <linux/ratelimit.h>
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#undef pr_fmt
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#define pr_fmt(fmt) "umip: " fmt
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/** DOC: Emulation for User-Mode Instruction Prevention (UMIP)
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*
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* The feature User-Mode Instruction Prevention present in recent Intel
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* processor prevents a group of instructions (sgdt, sidt, sldt, smsw, and str)
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* from being executed with CPL > 0. Otherwise, a general protection fault is
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* issued.
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*
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* Rather than relaying to the user space the general protection fault caused by
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* the UMIP-protected instructions (in the form of a SIGSEGV signal), it can be
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* trapped and emulate the result of such instructions to provide dummy values.
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* This allows to both conserve the current kernel behavior and not reveal the
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* system resources that UMIP intends to protect (i.e., the locations of the
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* global descriptor and interrupt descriptor tables, the segment selectors of
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* the local descriptor table, the value of the task state register and the
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* contents of the CR0 register).
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*
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* This emulation is needed because certain applications (e.g., WineHQ and
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* DOSEMU2) rely on this subset of instructions to function.
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*
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* The instructions protected by UMIP can be split in two groups. Those which
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* return a kernel memory address (sgdt and sidt) and those which return a
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* value (sldt, str and smsw).
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*
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* For the instructions that return a kernel memory address, applications
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* such as WineHQ rely on the result being located in the kernel memory space,
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* not the actual location of the table. The result is emulated as a hard-coded
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* value that, lies close to the top of the kernel memory. The limit for the GDT
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* and the IDT are set to zero.
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*
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* Given that sldt and str are not commonly used in programs that run on WineHQ
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* or DOSEMU2, they are not emulated.
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*
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* The instruction smsw is emulated to return the value that the register CR0
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* has at boot time as set in the head_32.
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*
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* Also, emulation is provided only for 32-bit processes; 64-bit processes
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* that attempt to use the instructions that UMIP protects will receive the
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* SIGSEGV signal issued as a consequence of the general protection fault.
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*
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* Care is taken to appropriately emulate the results when segmentation is
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* used. That is, rather than relying on USER_DS and USER_CS, the function
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* insn_get_addr_ref() inspects the segment descriptor pointed by the
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* registers in pt_regs. This ensures that we correctly obtain the segment
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* base address and the address and operand sizes even if the user space
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* application uses a local descriptor table.
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*/
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#define UMIP_DUMMY_GDT_BASE 0xfffe0000
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#define UMIP_DUMMY_IDT_BASE 0xffff0000
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/*
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* The SGDT and SIDT instructions store the contents of the global descriptor
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* table and interrupt table registers, respectively. The destination is a
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* memory operand of X+2 bytes. X bytes are used to store the base address of
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* the table and 2 bytes are used to store the limit. In 32-bit processes, the
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* only processes for which emulation is provided, X has a value of 4.
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*/
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#define UMIP_GDT_IDT_BASE_SIZE 4
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#define UMIP_GDT_IDT_LIMIT_SIZE 2
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#define UMIP_INST_SGDT 0 /* 0F 01 /0 */
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#define UMIP_INST_SIDT 1 /* 0F 01 /1 */
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#define UMIP_INST_SMSW 2 /* 0F 01 /4 */
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#define UMIP_INST_SLDT 3 /* 0F 00 /0 */
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#define UMIP_INST_STR 4 /* 0F 00 /1 */
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const char * const umip_insns[5] = {
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[UMIP_INST_SGDT] = "SGDT",
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[UMIP_INST_SIDT] = "SIDT",
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[UMIP_INST_SMSW] = "SMSW",
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[UMIP_INST_SLDT] = "SLDT",
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[UMIP_INST_STR] = "STR",
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};
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#define umip_pr_err(regs, fmt, ...) \
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umip_printk(regs, KERN_ERR, fmt, ##__VA_ARGS__)
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#define umip_pr_warning(regs, fmt, ...) \
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umip_printk(regs, KERN_WARNING, fmt, ##__VA_ARGS__)
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/**
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* umip_printk() - Print a rate-limited message
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* @regs: Register set with the context in which the warning is printed
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* @log_level: Kernel log level to print the message
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* @fmt: The text string to print
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*
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* Print the text contained in @fmt. The print rate is limited to bursts of 5
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* messages every two minutes. The purpose of this customized version of
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* printk() is to print messages when user space processes use any of the
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* UMIP-protected instructions. Thus, the printed text is prepended with the
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* task name and process ID number of the current task as well as the
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* instruction and stack pointers in @regs as seen when entering kernel mode.
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*
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* Returns:
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*
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* None.
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*/
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static __printf(3, 4)
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void umip_printk(const struct pt_regs *regs, const char *log_level,
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const char *fmt, ...)
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{
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/* Bursts of 5 messages every two minutes */
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static DEFINE_RATELIMIT_STATE(ratelimit, 2 * 60 * HZ, 5);
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struct task_struct *tsk = current;
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struct va_format vaf;
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va_list args;
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if (!__ratelimit(&ratelimit))
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return;
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va_start(args, fmt);
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vaf.fmt = fmt;
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vaf.va = &args;
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printk("%s" pr_fmt("%s[%d] ip:%lx sp:%lx: %pV"), log_level, tsk->comm,
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task_pid_nr(tsk), regs->ip, regs->sp, &vaf);
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va_end(args);
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}
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/**
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* identify_insn() - Identify a UMIP-protected instruction
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* @insn: Instruction structure with opcode and ModRM byte.
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*
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* From the opcode and ModRM.reg in @insn identify, if any, a UMIP-protected
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* instruction that can be emulated.
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*
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* Returns:
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*
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* On success, a constant identifying a specific UMIP-protected instruction that
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* can be emulated.
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*
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* -EINVAL on error or when not an UMIP-protected instruction that can be
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* emulated.
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*/
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static int identify_insn(struct insn *insn)
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{
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/* By getting modrm we also get the opcode. */
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insn_get_modrm(insn);
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if (!insn->modrm.nbytes)
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return -EINVAL;
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/* All the instructions of interest start with 0x0f. */
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if (insn->opcode.bytes[0] != 0xf)
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return -EINVAL;
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if (insn->opcode.bytes[1] == 0x1) {
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switch (X86_MODRM_REG(insn->modrm.value)) {
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case 0:
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return UMIP_INST_SGDT;
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case 1:
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return UMIP_INST_SIDT;
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case 4:
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return UMIP_INST_SMSW;
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default:
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return -EINVAL;
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}
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} else if (insn->opcode.bytes[1] == 0x0) {
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if (X86_MODRM_REG(insn->modrm.value) == 0)
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return UMIP_INST_SLDT;
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else if (X86_MODRM_REG(insn->modrm.value) == 1)
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return UMIP_INST_STR;
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else
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return -EINVAL;
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} else {
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return -EINVAL;
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}
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}
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/**
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* emulate_umip_insn() - Emulate UMIP instructions and return dummy values
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* @insn: Instruction structure with operands
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* @umip_inst: A constant indicating the instruction to emulate
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* @data: Buffer into which the dummy result is stored
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* @data_size: Size of the emulated result
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*
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* Emulate an instruction protected by UMIP and provide a dummy result. The
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* result of the emulation is saved in @data. The size of the results depends
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* on both the instruction and type of operand (register vs memory address).
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* The size of the result is updated in @data_size. Caller is responsible
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* of providing a @data buffer of at least UMIP_GDT_IDT_BASE_SIZE +
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* UMIP_GDT_IDT_LIMIT_SIZE bytes.
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*
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* Returns:
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*
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* 0 on success, -EINVAL on error while emulating.
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*/
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static int emulate_umip_insn(struct insn *insn, int umip_inst,
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unsigned char *data, int *data_size)
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{
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unsigned long dummy_base_addr, dummy_value;
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unsigned short dummy_limit = 0;
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if (!data || !data_size || !insn)
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return -EINVAL;
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/*
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* These two instructions return the base address and limit of the
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* global and interrupt descriptor table, respectively. According to the
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* Intel Software Development manual, the base address can be 24-bit,
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* 32-bit or 64-bit. Limit is always 16-bit. If the operand size is
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* 16-bit, the returned value of the base address is supposed to be a
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* zero-extended 24-byte number. However, it seems that a 32-byte number
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* is always returned irrespective of the operand size.
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*/
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if (umip_inst == UMIP_INST_SGDT || umip_inst == UMIP_INST_SIDT) {
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/* SGDT and SIDT do not use registers operands. */
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if (X86_MODRM_MOD(insn->modrm.value) == 3)
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return -EINVAL;
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if (umip_inst == UMIP_INST_SGDT)
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dummy_base_addr = UMIP_DUMMY_GDT_BASE;
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else
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dummy_base_addr = UMIP_DUMMY_IDT_BASE;
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*data_size = UMIP_GDT_IDT_LIMIT_SIZE + UMIP_GDT_IDT_BASE_SIZE;
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memcpy(data + 2, &dummy_base_addr, UMIP_GDT_IDT_BASE_SIZE);
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memcpy(data, &dummy_limit, UMIP_GDT_IDT_LIMIT_SIZE);
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} else if (umip_inst == UMIP_INST_SMSW) {
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dummy_value = CR0_STATE;
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/*
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* Even though the CR0 register has 4 bytes, the number
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* of bytes to be copied in the result buffer is determined
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* by whether the operand is a register or a memory location.
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* If operand is a register, return as many bytes as the operand
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* size. If operand is memory, return only the two least
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* siginificant bytes of CR0.
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*/
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if (X86_MODRM_MOD(insn->modrm.value) == 3)
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*data_size = insn->opnd_bytes;
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else
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*data_size = 2;
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memcpy(data, &dummy_value, *data_size);
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/* STR and SLDT are not emulated */
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} else {
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return -EINVAL;
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}
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return 0;
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}
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/**
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* force_sig_info_umip_fault() - Force a SIGSEGV with SEGV_MAPERR
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* @addr: Address that caused the signal
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* @regs: Register set containing the instruction pointer
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*
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* Force a SIGSEGV signal with SEGV_MAPERR as the error code. This function is
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* intended to be used to provide a segmentation fault when the result of the
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* UMIP emulation could not be copied to the user space memory.
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*
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* Returns: none
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*/
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static void force_sig_info_umip_fault(void __user *addr, struct pt_regs *regs)
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{
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siginfo_t info;
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struct task_struct *tsk = current;
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tsk->thread.cr2 = (unsigned long)addr;
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tsk->thread.error_code = X86_PF_USER | X86_PF_WRITE;
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tsk->thread.trap_nr = X86_TRAP_PF;
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clear_siginfo(&info);
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info.si_signo = SIGSEGV;
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info.si_errno = 0;
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info.si_code = SEGV_MAPERR;
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info.si_addr = addr;
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force_sig_info(SIGSEGV, &info, tsk);
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if (!(show_unhandled_signals && unhandled_signal(tsk, SIGSEGV)))
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return;
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umip_pr_err(regs, "segfault in emulation. error%x\n",
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X86_PF_USER | X86_PF_WRITE);
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}
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/**
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* fixup_umip_exception() - Fixup a general protection fault caused by UMIP
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* @regs: Registers as saved when entering the #GP handler
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*
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* The instructions sgdt, sidt, str, smsw, sldt cause a general protection
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* fault if executed with CPL > 0 (i.e., from user space). If the offending
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* user-space process is not in long mode, this function fixes the exception
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* up and provides dummy results for sgdt, sidt and smsw; str and sldt are not
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* fixed up. Also long mode user-space processes are not fixed up.
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*
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* If operands are memory addresses, results are copied to user-space memory as
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* indicated by the instruction pointed by eIP using the registers indicated in
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* the instruction operands. If operands are registers, results are copied into
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* the context that was saved when entering kernel mode.
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*
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* Returns:
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*
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* True if emulation was successful; false if not.
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*/
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bool fixup_umip_exception(struct pt_regs *regs)
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{
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int not_copied, nr_copied, reg_offset, dummy_data_size, umip_inst;
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unsigned long seg_base = 0, *reg_addr;
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/* 10 bytes is the maximum size of the result of UMIP instructions */
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unsigned char dummy_data[10] = { 0 };
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unsigned char buf[MAX_INSN_SIZE];
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void __user *uaddr;
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struct insn insn;
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int seg_defs;
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if (!regs)
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return false;
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/*
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* If not in user-space long mode, a custom code segment could be in
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* use. This is true in protected mode (if the process defined a local
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* descriptor table), or virtual-8086 mode. In most of the cases
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* seg_base will be zero as in USER_CS.
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*/
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if (!user_64bit_mode(regs))
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seg_base = insn_get_seg_base(regs, INAT_SEG_REG_CS);
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if (seg_base == -1L)
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return false;
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not_copied = copy_from_user(buf, (void __user *)(seg_base + regs->ip),
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sizeof(buf));
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nr_copied = sizeof(buf) - not_copied;
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/*
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* The copy_from_user above could have failed if user code is protected
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* by a memory protection key. Give up on emulation in such a case.
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* Should we issue a page fault?
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*/
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if (!nr_copied)
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return false;
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insn_init(&insn, buf, nr_copied, user_64bit_mode(regs));
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/*
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* Override the default operand and address sizes with what is specified
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* in the code segment descriptor. The instruction decoder only sets
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* the address size it to either 4 or 8 address bytes and does nothing
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* for the operand bytes. This OK for most of the cases, but we could
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* have special cases where, for instance, a 16-bit code segment
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* descriptor is used.
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* If there is an address override prefix, the instruction decoder
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* correctly updates these values, even for 16-bit defaults.
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*/
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seg_defs = insn_get_code_seg_params(regs);
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if (seg_defs == -EINVAL)
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return false;
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insn.addr_bytes = INSN_CODE_SEG_ADDR_SZ(seg_defs);
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insn.opnd_bytes = INSN_CODE_SEG_OPND_SZ(seg_defs);
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insn_get_length(&insn);
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if (nr_copied < insn.length)
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return false;
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umip_inst = identify_insn(&insn);
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if (umip_inst < 0)
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return false;
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umip_pr_warning(regs, "%s instruction cannot be used by applications.\n",
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umip_insns[umip_inst]);
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/* Do not emulate SLDT, STR or user long mode processes. */
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if (umip_inst == UMIP_INST_STR || umip_inst == UMIP_INST_SLDT || user_64bit_mode(regs))
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return false;
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umip_pr_warning(regs, "For now, expensive software emulation returns the result.\n");
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if (emulate_umip_insn(&insn, umip_inst, dummy_data, &dummy_data_size))
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return false;
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/*
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* If operand is a register, write result to the copy of the register
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* value that was pushed to the stack when entering into kernel mode.
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* Upon exit, the value we write will be restored to the actual hardware
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* register.
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*/
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if (X86_MODRM_MOD(insn.modrm.value) == 3) {
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reg_offset = insn_get_modrm_rm_off(&insn, regs);
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/*
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* Negative values are usually errors. In memory addressing,
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* the exception is -EDOM. Since we expect a register operand,
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* all negative values are errors.
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*/
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if (reg_offset < 0)
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return false;
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reg_addr = (unsigned long *)((unsigned long)regs + reg_offset);
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memcpy(reg_addr, dummy_data, dummy_data_size);
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} else {
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uaddr = insn_get_addr_ref(&insn, regs);
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if ((unsigned long)uaddr == -1L)
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return false;
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nr_copied = copy_to_user(uaddr, dummy_data, dummy_data_size);
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if (nr_copied > 0) {
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/*
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* If copy fails, send a signal and tell caller that
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* fault was fixed up.
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*/
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force_sig_info_umip_fault(uaddr, regs);
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return true;
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}
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}
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/* increase IP to let the program keep going */
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regs->ip += insn.length;
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return true;
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}
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