596 lines
15 KiB
C
596 lines
15 KiB
C
/*
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* QLogic iSCSI HBA Driver
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* Copyright (c) 2003-2006 QLogic Corporation
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*
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* See LICENSE.qla4xxx for copyright and licensing details.
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*/
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#ifndef __QL4_DEF_H
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#define __QL4_DEF_H
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/list.h>
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#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/dmapool.h>
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#include <linux/mempool.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/mutex.h>
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#include <net/tcp.h>
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#include <scsi/scsi.h>
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#include <scsi/scsi_host.h>
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#include <scsi/scsi_device.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_transport.h>
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#include <scsi/scsi_transport_iscsi.h>
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#ifndef PCI_DEVICE_ID_QLOGIC_ISP4010
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#define PCI_DEVICE_ID_QLOGIC_ISP4010 0x4010
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#endif
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#ifndef PCI_DEVICE_ID_QLOGIC_ISP4022
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#define PCI_DEVICE_ID_QLOGIC_ISP4022 0x4022
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#endif
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#ifndef PCI_DEVICE_ID_QLOGIC_ISP4032
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#define PCI_DEVICE_ID_QLOGIC_ISP4032 0x4032
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#endif
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#define QLA_SUCCESS 0
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#define QLA_ERROR 1
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/*
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* Data bit definitions
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*/
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#define BIT_0 0x1
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#define BIT_1 0x2
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#define BIT_2 0x4
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#define BIT_3 0x8
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#define BIT_4 0x10
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#define BIT_5 0x20
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#define BIT_6 0x40
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#define BIT_7 0x80
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#define BIT_8 0x100
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#define BIT_9 0x200
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#define BIT_10 0x400
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#define BIT_11 0x800
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#define BIT_12 0x1000
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#define BIT_13 0x2000
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#define BIT_14 0x4000
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#define BIT_15 0x8000
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#define BIT_16 0x10000
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#define BIT_17 0x20000
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#define BIT_18 0x40000
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#define BIT_19 0x80000
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#define BIT_20 0x100000
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#define BIT_21 0x200000
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#define BIT_22 0x400000
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#define BIT_23 0x800000
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#define BIT_24 0x1000000
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#define BIT_25 0x2000000
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#define BIT_26 0x4000000
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#define BIT_27 0x8000000
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#define BIT_28 0x10000000
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#define BIT_29 0x20000000
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#define BIT_30 0x40000000
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#define BIT_31 0x80000000
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/*
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* Host adapter default definitions
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***********************************/
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#define MAX_HBAS 16
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#define MAX_BUSES 1
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#define MAX_TARGETS (MAX_PRST_DEV_DB_ENTRIES + MAX_DEV_DB_ENTRIES)
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#define MAX_LUNS 0xffff
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#define MAX_AEN_ENTRIES 256 /* should be > EXT_DEF_MAX_AEN_QUEUE */
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#define MAX_DDB_ENTRIES (MAX_PRST_DEV_DB_ENTRIES + MAX_DEV_DB_ENTRIES)
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#define MAX_PDU_ENTRIES 32
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#define INVALID_ENTRY 0xFFFF
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#define MAX_CMDS_TO_RISC 1024
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#define MAX_SRBS MAX_CMDS_TO_RISC
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#define MBOX_AEN_REG_COUNT 5
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#define MAX_INIT_RETRIES 5
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#define IOCB_HIWAT_CUSHION 16
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/*
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* Buffer sizes
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*/
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#define REQUEST_QUEUE_DEPTH MAX_CMDS_TO_RISC
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#define RESPONSE_QUEUE_DEPTH 64
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#define QUEUE_SIZE 64
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#define DMA_BUFFER_SIZE 512
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/*
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* Misc
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*/
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#define MAC_ADDR_LEN 6 /* in bytes */
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#define IP_ADDR_LEN 4 /* in bytes */
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#define DRIVER_NAME "qla4xxx"
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#define MAX_LINKED_CMDS_PER_LUN 3
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#define MAX_REQS_SERVICED_PER_INTR 16
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#define ISCSI_IPADDR_SIZE 4 /* IP address size */
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#define ISCSI_ALIAS_SIZE 32 /* ISCSI Alais name size */
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#define ISCSI_NAME_SIZE 255 /* ISCSI Name size -
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* usually a string */
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#define LSDW(x) ((u32)((u64)(x)))
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#define MSDW(x) ((u32)((((u64)(x)) >> 16) >> 16))
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/*
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* Retry & Timeout Values
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*/
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#define MBOX_TOV 60
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#define SOFT_RESET_TOV 30
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#define RESET_INTR_TOV 3
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#define SEMAPHORE_TOV 10
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#define ADAPTER_INIT_TOV 120
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#define ADAPTER_RESET_TOV 180
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#define EXTEND_CMD_TOV 60
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#define WAIT_CMD_TOV 30
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#define EH_WAIT_CMD_TOV 120
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#define FIRMWARE_UP_TOV 60
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#define RESET_FIRMWARE_TOV 30
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#define LOGOUT_TOV 10
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#define IOCB_TOV_MARGIN 10
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#define RELOGIN_TOV 18
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#define ISNS_DEREG_TOV 5
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#define MAX_RESET_HA_RETRIES 2
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/*
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* SCSI Request Block structure (srb) that is placed
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* on cmd->SCp location of every I/O [We have 22 bytes available]
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*/
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struct srb {
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struct list_head list; /* (8) */
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struct scsi_qla_host *ha; /* HA the SP is queued on */
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struct ddb_entry *ddb;
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uint16_t flags; /* (1) Status flags. */
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#define SRB_DMA_VALID BIT_3 /* DMA Buffer mapped. */
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#define SRB_GOT_SENSE BIT_4 /* sense data recieved. */
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uint8_t state; /* (1) Status flags. */
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#define SRB_NO_QUEUE_STATE 0 /* Request is in between states */
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#define SRB_FREE_STATE 1
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#define SRB_ACTIVE_STATE 3
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#define SRB_ACTIVE_TIMEOUT_STATE 4
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#define SRB_SUSPENDED_STATE 7 /* Request in suspended state */
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struct scsi_cmnd *cmd; /* (4) SCSI command block */
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dma_addr_t dma_handle; /* (4) for unmap of single transfers */
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atomic_t ref_count; /* reference count for this srb */
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uint32_t fw_ddb_index;
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uint8_t err_id; /* error id */
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#define SRB_ERR_PORT 1 /* Request failed because "port down" */
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#define SRB_ERR_LOOP 2 /* Request failed because "loop down" */
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#define SRB_ERR_DEVICE 3 /* Request failed because "device error" */
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#define SRB_ERR_OTHER 4
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uint16_t reserved;
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uint16_t iocb_tov;
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uint16_t iocb_cnt; /* Number of used iocbs */
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uint16_t cc_stat;
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u_long r_start; /* Time we recieve a cmd from OS */
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u_long u_start; /* Time when we handed the cmd to F/W */
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};
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/*
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* Device Database (DDB) structure
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*/
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struct ddb_entry {
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struct list_head list; /* ddb list */
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struct scsi_qla_host *ha;
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struct iscsi_cls_session *sess;
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struct iscsi_cls_conn *conn;
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atomic_t state; /* DDB State */
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unsigned long flags; /* DDB Flags */
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unsigned long dev_scan_wait_to_start_relogin;
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unsigned long dev_scan_wait_to_complete_relogin;
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uint16_t os_target_id; /* Target ID */
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uint16_t fw_ddb_index; /* DDB firmware index */
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uint8_t reserved[2];
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uint32_t fw_ddb_device_state; /* F/W Device State -- see ql4_fw.h */
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uint32_t CmdSn;
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uint16_t target_session_id;
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uint16_t connection_id;
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uint16_t exe_throttle; /* Max mumber of cmds outstanding
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* simultaneously */
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uint16_t task_mgmt_timeout; /* Min time for task mgmt cmds to
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* complete */
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uint16_t default_relogin_timeout; /* Max time to wait for
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* relogin to complete */
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uint16_t tcp_source_port_num;
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uint32_t default_time2wait; /* Default Min time between
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* relogins (+aens) */
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atomic_t port_down_timer; /* Device connection timer */
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atomic_t retry_relogin_timer; /* Min Time between relogins
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* (4000 only) */
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atomic_t relogin_timer; /* Max Time to wait for relogin to complete */
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atomic_t relogin_retry_count; /* Num of times relogin has been
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* retried */
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uint16_t port;
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uint32_t tpgt;
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uint8_t ip_addr[ISCSI_IPADDR_SIZE];
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uint8_t iscsi_name[ISCSI_NAME_SIZE]; /* 72 x48 */
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uint8_t iscsi_alias[0x20];
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};
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/*
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* DDB states.
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*/
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#define DDB_STATE_DEAD 0 /* We can no longer talk to
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* this device */
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#define DDB_STATE_ONLINE 1 /* Device ready to accept
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* commands */
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#define DDB_STATE_MISSING 2 /* Device logged off, trying
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* to re-login */
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/*
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* DDB flags.
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*/
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#define DF_RELOGIN 0 /* Relogin to device */
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#define DF_NO_RELOGIN 1 /* Do not relogin if IOCTL
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* logged it out */
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#define DF_ISNS_DISCOVERED 2 /* Device was discovered via iSNS */
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#define DF_FO_MASKED 3
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/*
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* Asynchronous Event Queue structure
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*/
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struct aen {
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uint32_t mbox_sts[MBOX_AEN_REG_COUNT];
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};
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#include "ql4_fw.h"
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#include "ql4_nvram.h"
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/*
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* Linux Host Adapter structure
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*/
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struct scsi_qla_host {
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/* Linux adapter configuration data */
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struct Scsi_Host *host; /* pointer to host data */
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uint32_t tot_ddbs;
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unsigned long flags;
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#define AF_ONLINE 0 /* 0x00000001 */
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#define AF_INIT_DONE 1 /* 0x00000002 */
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#define AF_MBOX_COMMAND 2 /* 0x00000004 */
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#define AF_MBOX_COMMAND_DONE 3 /* 0x00000008 */
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#define AF_INTERRUPTS_ON 6 /* 0x00000040 Not Used */
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#define AF_GET_CRASH_RECORD 7 /* 0x00000080 */
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#define AF_LINK_UP 8 /* 0x00000100 */
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#define AF_IRQ_ATTACHED 10 /* 0x00000400 */
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#define AF_ISNS_CMD_IN_PROCESS 12 /* 0x00001000 */
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#define AF_ISNS_CMD_DONE 13 /* 0x00002000 */
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unsigned long dpc_flags;
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#define DPC_RESET_HA 1 /* 0x00000002 */
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#define DPC_RETRY_RESET_HA 2 /* 0x00000004 */
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#define DPC_RELOGIN_DEVICE 3 /* 0x00000008 */
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#define DPC_RESET_HA_DESTROY_DDB_LIST 4 /* 0x00000010 */
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#define DPC_RESET_HA_INTR 5 /* 0x00000020 */
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#define DPC_ISNS_RESTART 7 /* 0x00000080 */
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#define DPC_AEN 9 /* 0x00000200 */
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#define DPC_GET_DHCP_IP_ADDR 15 /* 0x00008000 */
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uint16_t iocb_cnt;
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uint16_t iocb_hiwat;
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/* SRB cache. */
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#define SRB_MIN_REQ 128
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mempool_t *srb_mempool;
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/* pci information */
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struct pci_dev *pdev;
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struct isp_reg __iomem *reg; /* Base I/O address */
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unsigned long pio_address;
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unsigned long pio_length;
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#define MIN_IOBASE_LEN 0x100
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uint16_t req_q_count;
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uint8_t marker_needed;
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uint8_t rsvd1;
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unsigned long host_no;
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/* NVRAM registers */
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struct eeprom_data *nvram;
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spinlock_t hardware_lock ____cacheline_aligned;
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uint32_t eeprom_cmd_data;
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/* Counters for general statistics */
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uint64_t isr_count;
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uint64_t adapter_error_count;
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uint64_t device_error_count;
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uint64_t total_io_count;
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uint64_t total_mbytes_xferred;
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uint64_t link_failure_count;
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uint64_t invalid_crc_count;
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uint32_t bytes_xfered;
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uint32_t spurious_int_count;
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uint32_t aborted_io_count;
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uint32_t io_timeout_count;
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uint32_t mailbox_timeout_count;
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uint32_t seconds_since_last_intr;
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uint32_t seconds_since_last_heartbeat;
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uint32_t mac_index;
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/* Info Needed for Management App */
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/* --- From GetFwVersion --- */
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uint32_t firmware_version[2];
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uint32_t patch_number;
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uint32_t build_number;
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/* --- From Init_FW --- */
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/* init_cb_t *init_cb; */
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uint16_t firmware_options;
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uint16_t tcp_options;
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uint8_t ip_address[IP_ADDR_LEN];
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uint8_t subnet_mask[IP_ADDR_LEN];
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uint8_t gateway[IP_ADDR_LEN];
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uint8_t alias[32];
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uint8_t name_string[256];
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uint8_t heartbeat_interval;
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uint8_t rsvd;
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/* --- From FlashSysInfo --- */
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uint8_t my_mac[MAC_ADDR_LEN];
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uint8_t serial_number[16];
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/* --- From GetFwState --- */
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uint32_t firmware_state;
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uint32_t board_id;
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uint32_t addl_fw_state;
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/* Linux kernel thread */
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struct workqueue_struct *dpc_thread;
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struct work_struct dpc_work;
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/* Linux timer thread */
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struct timer_list timer;
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uint32_t timer_active;
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/* Recovery Timers */
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uint32_t port_down_retry_count;
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uint32_t discovery_wait;
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atomic_t check_relogin_timeouts;
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uint32_t retry_reset_ha_cnt;
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uint32_t isp_reset_timer; /* reset test timer */
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uint32_t nic_reset_timer; /* simulated nic reset test timer */
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int eh_start;
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struct list_head free_srb_q;
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uint16_t free_srb_q_count;
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uint16_t num_srbs_allocated;
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/* DMA Memory Block */
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void *queues;
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dma_addr_t queues_dma;
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unsigned long queues_len;
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#define MEM_ALIGN_VALUE \
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((max(REQUEST_QUEUE_DEPTH, RESPONSE_QUEUE_DEPTH)) * \
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sizeof(struct queue_entry))
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/* request and response queue variables */
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dma_addr_t request_dma;
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struct queue_entry *request_ring;
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struct queue_entry *request_ptr;
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dma_addr_t response_dma;
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struct queue_entry *response_ring;
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struct queue_entry *response_ptr;
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dma_addr_t shadow_regs_dma;
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struct shadow_regs *shadow_regs;
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uint16_t request_in; /* Current indexes. */
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uint16_t request_out;
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uint16_t response_in;
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uint16_t response_out;
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/* aen queue variables */
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uint16_t aen_q_count; /* Number of available aen_q entries */
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uint16_t aen_in; /* Current indexes */
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uint16_t aen_out;
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struct aen aen_q[MAX_AEN_ENTRIES];
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/* This mutex protects several threads to do mailbox commands
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* concurrently.
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*/
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struct mutex mbox_sem;
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wait_queue_head_t mailbox_wait_queue;
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/* temporary mailbox status registers */
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volatile uint8_t mbox_status_count;
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volatile uint32_t mbox_status[MBOX_REG_COUNT];
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/* local device database list (contains internal ddb entries) */
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struct list_head ddb_list;
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/* Map ddb_list entry by FW ddb index */
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struct ddb_entry *fw_ddb_index_map[MAX_DDB_ENTRIES];
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};
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static inline int is_qla4010(struct scsi_qla_host *ha)
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{
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return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4010;
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}
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static inline int is_qla4022(struct scsi_qla_host *ha)
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{
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return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4022;
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}
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static inline int is_qla4032(struct scsi_qla_host *ha)
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{
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return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4032;
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}
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static inline int adapter_up(struct scsi_qla_host *ha)
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{
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return (test_bit(AF_ONLINE, &ha->flags) != 0) &&
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(test_bit(AF_LINK_UP, &ha->flags) != 0);
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}
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static inline struct scsi_qla_host* to_qla_host(struct Scsi_Host *shost)
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{
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return (struct scsi_qla_host *)shost->hostdata;
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}
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static inline void __iomem* isp_semaphore(struct scsi_qla_host *ha)
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{
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return (is_qla4010(ha) ?
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&ha->reg->u1.isp4010.nvram :
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&ha->reg->u1.isp4022.semaphore);
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}
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static inline void __iomem* isp_nvram(struct scsi_qla_host *ha)
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{
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return (is_qla4010(ha) ?
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&ha->reg->u1.isp4010.nvram :
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&ha->reg->u1.isp4022.nvram);
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}
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static inline void __iomem* isp_ext_hw_conf(struct scsi_qla_host *ha)
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{
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return (is_qla4010(ha) ?
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&ha->reg->u2.isp4010.ext_hw_conf :
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&ha->reg->u2.isp4022.p0.ext_hw_conf);
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}
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static inline void __iomem* isp_port_status(struct scsi_qla_host *ha)
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{
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return (is_qla4010(ha) ?
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&ha->reg->u2.isp4010.port_status :
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&ha->reg->u2.isp4022.p0.port_status);
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}
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|
|
|
static inline void __iomem* isp_port_ctrl(struct scsi_qla_host *ha)
|
|
{
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|
return (is_qla4010(ha) ?
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|
&ha->reg->u2.isp4010.port_ctrl :
|
|
&ha->reg->u2.isp4022.p0.port_ctrl);
|
|
}
|
|
|
|
static inline void __iomem* isp_port_error_status(struct scsi_qla_host *ha)
|
|
{
|
|
return (is_qla4010(ha) ?
|
|
&ha->reg->u2.isp4010.port_err_status :
|
|
&ha->reg->u2.isp4022.p0.port_err_status);
|
|
}
|
|
|
|
static inline void __iomem * isp_gp_out(struct scsi_qla_host *ha)
|
|
{
|
|
return (is_qla4010(ha) ?
|
|
&ha->reg->u2.isp4010.gp_out :
|
|
&ha->reg->u2.isp4022.p0.gp_out);
|
|
}
|
|
|
|
static inline int eeprom_ext_hw_conf_offset(struct scsi_qla_host *ha)
|
|
{
|
|
return (is_qla4010(ha) ?
|
|
offsetof(struct eeprom_data, isp4010.ext_hw_conf) / 2 :
|
|
offsetof(struct eeprom_data, isp4022.ext_hw_conf) / 2);
|
|
}
|
|
|
|
int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits);
|
|
void ql4xxx_sem_unlock(struct scsi_qla_host * ha, u32 sem_mask);
|
|
int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits);
|
|
|
|
static inline int ql4xxx_lock_flash(struct scsi_qla_host *a)
|
|
{
|
|
if (is_qla4010(a))
|
|
return ql4xxx_sem_spinlock(a, QL4010_FLASH_SEM_MASK,
|
|
QL4010_FLASH_SEM_BITS);
|
|
else
|
|
return ql4xxx_sem_spinlock(a, QL4022_FLASH_SEM_MASK,
|
|
(QL4022_RESOURCE_BITS_BASE_CODE |
|
|
(a->mac_index)) << 13);
|
|
}
|
|
|
|
static inline void ql4xxx_unlock_flash(struct scsi_qla_host *a)
|
|
{
|
|
if (is_qla4010(a))
|
|
ql4xxx_sem_unlock(a, QL4010_FLASH_SEM_MASK);
|
|
else
|
|
ql4xxx_sem_unlock(a, QL4022_FLASH_SEM_MASK);
|
|
}
|
|
|
|
static inline int ql4xxx_lock_nvram(struct scsi_qla_host *a)
|
|
{
|
|
if (is_qla4010(a))
|
|
return ql4xxx_sem_spinlock(a, QL4010_NVRAM_SEM_MASK,
|
|
QL4010_NVRAM_SEM_BITS);
|
|
else
|
|
return ql4xxx_sem_spinlock(a, QL4022_NVRAM_SEM_MASK,
|
|
(QL4022_RESOURCE_BITS_BASE_CODE |
|
|
(a->mac_index)) << 10);
|
|
}
|
|
|
|
static inline void ql4xxx_unlock_nvram(struct scsi_qla_host *a)
|
|
{
|
|
if (is_qla4010(a))
|
|
ql4xxx_sem_unlock(a, QL4010_NVRAM_SEM_MASK);
|
|
else
|
|
ql4xxx_sem_unlock(a, QL4022_NVRAM_SEM_MASK);
|
|
}
|
|
|
|
static inline int ql4xxx_lock_drvr(struct scsi_qla_host *a)
|
|
{
|
|
if (is_qla4010(a))
|
|
return ql4xxx_sem_lock(a, QL4010_DRVR_SEM_MASK,
|
|
QL4010_DRVR_SEM_BITS);
|
|
else
|
|
return ql4xxx_sem_lock(a, QL4022_DRVR_SEM_MASK,
|
|
(QL4022_RESOURCE_BITS_BASE_CODE |
|
|
(a->mac_index)) << 1);
|
|
}
|
|
|
|
static inline void ql4xxx_unlock_drvr(struct scsi_qla_host *a)
|
|
{
|
|
if (is_qla4010(a))
|
|
ql4xxx_sem_unlock(a, QL4010_DRVR_SEM_MASK);
|
|
else
|
|
ql4xxx_sem_unlock(a, QL4022_DRVR_SEM_MASK);
|
|
}
|
|
|
|
/*---------------------------------------------------------------------------*/
|
|
|
|
/* Defines for qla4xxx_initialize_adapter() and qla4xxx_recover_adapter() */
|
|
#define PRESERVE_DDB_LIST 0
|
|
#define REBUILD_DDB_LIST 1
|
|
|
|
/* Defines for process_aen() */
|
|
#define PROCESS_ALL_AENS 0
|
|
#define FLUSH_DDB_CHANGED_AENS 1
|
|
#define RELOGIN_DDB_CHANGED_AENS 2
|
|
|
|
#include "ql4_version.h"
|
|
#include "ql4_glbl.h"
|
|
#include "ql4_dbg.h"
|
|
#include "ql4_inline.h"
|
|
|
|
|
|
#endif /*_QLA4XXX_H */
|