64 lines
1.7 KiB
C
64 lines
1.7 KiB
C
/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _CORESIGHT_PRIV_H
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#define _CORESIGHT_PRIV_H
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <linux/coresight.h>
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/*
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* Coresight management registers (0xf00-0xfcc)
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* 0xfa0 - 0xfa4: Management registers in PFTv1.0
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* Trace registers in PFTv1.1
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*/
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#define CORESIGHT_ITCTRL 0xf00
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#define CORESIGHT_CLAIMSET 0xfa0
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#define CORESIGHT_CLAIMCLR 0xfa4
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#define CORESIGHT_LAR 0xfb0
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#define CORESIGHT_LSR 0xfb4
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#define CORESIGHT_AUTHSTATUS 0xfb8
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#define CORESIGHT_DEVID 0xfc8
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#define CORESIGHT_DEVTYPE 0xfcc
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#define TIMEOUT_US 100
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#define BMVAL(val, lsb, msb) ((val & GENMASK(msb, lsb)) >> lsb)
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static inline void CS_LOCK(void __iomem *addr)
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{
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do {
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/* Wait for things to settle */
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mb();
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writel_relaxed(0x0, addr + CORESIGHT_LAR);
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} while (0);
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}
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static inline void CS_UNLOCK(void __iomem *addr)
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{
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do {
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writel_relaxed(CORESIGHT_UNLOCK, addr + CORESIGHT_LAR);
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/* Make sure everyone has seen this */
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mb();
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} while (0);
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}
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#ifdef CONFIG_CORESIGHT_SOURCE_ETM3X
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extern int etm_readl_cp14(u32 off, unsigned int *val);
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extern int etm_writel_cp14(u32 off, u32 val);
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#else
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static inline int etm_readl_cp14(u32 off, unsigned int *val) { return 0; }
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static inline int etm_writel_cp14(u32 off, u32 val) { return 0; }
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#endif
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#endif
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