a853205efb
This patch adds support for the HannStar Display Corp. HSD070PWW1 7.0" WXGA TFT LCD panel to the simple-panel driver. The binding documentation is included. This panel is connected via LVDS and uses the data enable signal for timing. Since HSYNC/VSYNC are ignored, the split between sync length and porches is arbitrary, as long as the complete horizontal blanking interval is 160 clocks, and the vertical blanking interval is 23 lines. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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| drm | ||
| host1x | ||
| ipu-v3 | ||
| vga | ||
| Makefile | ||