378 lines
8.7 KiB
C
378 lines
8.7 KiB
C
/*
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* Copyright (c) 2005 Ammasso, Inc. All rights reserved.
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* Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/slab.h>
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#include "c2.h"
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#include "c2_vq.h"
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#define PBL_VIRT 1
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#define PBL_PHYS 2
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/*
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* Send all the PBL messages to convey the remainder of the PBL
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* Wait for the adapter's reply on the last one.
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* This is indicated by setting the MEM_PBL_COMPLETE in the flags.
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*
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* NOTE: vq_req is _not_ freed by this function. The VQ Host
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* Reply buffer _is_ freed by this function.
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*/
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static int
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send_pbl_messages(struct c2_dev *c2dev, __be32 stag_index,
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unsigned long va, u32 pbl_depth,
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struct c2_vq_req *vq_req, int pbl_type)
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{
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u32 pbe_count; /* amt that fits in a PBL msg */
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u32 count; /* amt in this PBL MSG. */
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struct c2wr_nsmr_pbl_req *wr; /* PBL WR ptr */
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struct c2wr_nsmr_pbl_rep *reply; /* reply ptr */
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int err, pbl_virt, pbl_index, i;
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switch (pbl_type) {
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case PBL_VIRT:
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pbl_virt = 1;
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break;
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case PBL_PHYS:
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pbl_virt = 0;
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break;
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default:
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return -EINVAL;
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break;
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}
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pbe_count = (c2dev->req_vq.msg_size -
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sizeof(struct c2wr_nsmr_pbl_req)) / sizeof(u64);
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wr = kmalloc(c2dev->req_vq.msg_size, GFP_KERNEL);
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if (!wr) {
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return -ENOMEM;
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}
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c2_wr_set_id(wr, CCWR_NSMR_PBL);
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/*
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* Only the last PBL message will generate a reply from the verbs,
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* so we set the context to 0 indicating there is no kernel verbs
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* handler blocked awaiting this reply.
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*/
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wr->hdr.context = 0;
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wr->rnic_handle = c2dev->adapter_handle;
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wr->stag_index = stag_index; /* already swapped */
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wr->flags = 0;
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pbl_index = 0;
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while (pbl_depth) {
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count = min(pbe_count, pbl_depth);
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wr->addrs_length = cpu_to_be32(count);
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/*
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* If this is the last message, then reference the
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* vq request struct cuz we're gonna wait for a reply.
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* also make this PBL msg as the last one.
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*/
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if (count == pbl_depth) {
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/*
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* reference the request struct. dereferenced in the
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* int handler.
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*/
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vq_req_get(c2dev, vq_req);
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wr->flags = cpu_to_be32(MEM_PBL_COMPLETE);
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/*
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* This is the last PBL message.
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* Set the context to our VQ Request Object so we can
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* wait for the reply.
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*/
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wr->hdr.context = (unsigned long) vq_req;
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}
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/*
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* If pbl_virt is set then va is a virtual address
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* that describes a virtually contiguous memory
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* allocation. The wr needs the start of each virtual page
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* to be converted to the corresponding physical address
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* of the page. If pbl_virt is not set then va is an array
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* of physical addresses and there is no conversion to do.
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* Just fill in the wr with what is in the array.
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*/
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for (i = 0; i < count; i++) {
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if (pbl_virt) {
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va += PAGE_SIZE;
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} else {
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wr->paddrs[i] =
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cpu_to_be64(((u64 *)va)[pbl_index + i]);
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}
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}
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/*
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* Send WR to adapter
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*/
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err = vq_send_wr(c2dev, (union c2wr *) wr);
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if (err) {
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if (count <= pbe_count) {
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vq_req_put(c2dev, vq_req);
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}
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goto bail0;
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}
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pbl_depth -= count;
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pbl_index += count;
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}
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/*
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* Now wait for the reply...
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*/
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err = vq_wait_for_reply(c2dev, vq_req);
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if (err) {
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goto bail0;
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}
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/*
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* Process reply
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*/
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reply = (struct c2wr_nsmr_pbl_rep *) (unsigned long) vq_req->reply_msg;
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if (!reply) {
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err = -ENOMEM;
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goto bail0;
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}
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err = c2_errno(reply);
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vq_repbuf_free(c2dev, reply);
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bail0:
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kfree(wr);
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return err;
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}
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#define C2_PBL_MAX_DEPTH 131072
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int
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c2_nsmr_register_phys_kern(struct c2_dev *c2dev, u64 *addr_list,
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int page_size, int pbl_depth, u32 length,
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u32 offset, u64 *va, enum c2_acf acf,
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struct c2_mr *mr)
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{
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struct c2_vq_req *vq_req;
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struct c2wr_nsmr_register_req *wr;
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struct c2wr_nsmr_register_rep *reply;
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u16 flags;
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int i, pbe_count, count;
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int err;
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if (!va || !length || !addr_list || !pbl_depth)
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return -EINTR;
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/*
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* Verify PBL depth is within rnic max
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*/
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if (pbl_depth > C2_PBL_MAX_DEPTH) {
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return -EINTR;
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}
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/*
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* allocate verbs request object
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*/
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vq_req = vq_req_alloc(c2dev);
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if (!vq_req)
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return -ENOMEM;
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wr = kmalloc(c2dev->req_vq.msg_size, GFP_KERNEL);
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if (!wr) {
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err = -ENOMEM;
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goto bail0;
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}
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/*
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* build the WR
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*/
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c2_wr_set_id(wr, CCWR_NSMR_REGISTER);
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wr->hdr.context = (unsigned long) vq_req;
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wr->rnic_handle = c2dev->adapter_handle;
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flags = (acf | MEM_VA_BASED | MEM_REMOTE);
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/*
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* compute how many pbes can fit in the message
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*/
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pbe_count = (c2dev->req_vq.msg_size -
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sizeof(struct c2wr_nsmr_register_req)) / sizeof(u64);
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if (pbl_depth <= pbe_count) {
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flags |= MEM_PBL_COMPLETE;
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}
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wr->flags = cpu_to_be16(flags);
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wr->stag_key = 0; //stag_key;
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wr->va = cpu_to_be64(*va);
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wr->pd_id = mr->pd->pd_id;
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wr->pbe_size = cpu_to_be32(page_size);
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wr->length = cpu_to_be32(length);
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wr->pbl_depth = cpu_to_be32(pbl_depth);
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wr->fbo = cpu_to_be32(offset);
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count = min(pbl_depth, pbe_count);
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wr->addrs_length = cpu_to_be32(count);
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/*
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* fill out the PBL for this message
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*/
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for (i = 0; i < count; i++) {
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wr->paddrs[i] = cpu_to_be64(addr_list[i]);
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}
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/*
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* regerence the request struct
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*/
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vq_req_get(c2dev, vq_req);
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/*
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* send the WR to the adapter
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*/
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err = vq_send_wr(c2dev, (union c2wr *) wr);
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if (err) {
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vq_req_put(c2dev, vq_req);
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goto bail1;
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}
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/*
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* wait for reply from adapter
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*/
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err = vq_wait_for_reply(c2dev, vq_req);
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if (err) {
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goto bail1;
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}
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/*
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* process reply
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*/
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reply =
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(struct c2wr_nsmr_register_rep *) (unsigned long) (vq_req->reply_msg);
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if (!reply) {
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err = -ENOMEM;
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goto bail1;
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}
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if ((err = c2_errno(reply))) {
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goto bail2;
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}
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//*p_pb_entries = be32_to_cpu(reply->pbl_depth);
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mr->ibmr.lkey = mr->ibmr.rkey = be32_to_cpu(reply->stag_index);
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vq_repbuf_free(c2dev, reply);
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/*
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* if there are still more PBEs we need to send them to
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* the adapter and wait for a reply on the final one.
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* reuse vq_req for this purpose.
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*/
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pbl_depth -= count;
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if (pbl_depth) {
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vq_req->reply_msg = (unsigned long) NULL;
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atomic_set(&vq_req->reply_ready, 0);
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err = send_pbl_messages(c2dev,
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cpu_to_be32(mr->ibmr.lkey),
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(unsigned long) &addr_list[i],
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pbl_depth, vq_req, PBL_PHYS);
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if (err) {
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goto bail1;
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}
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}
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vq_req_free(c2dev, vq_req);
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kfree(wr);
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return err;
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bail2:
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vq_repbuf_free(c2dev, reply);
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bail1:
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kfree(wr);
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bail0:
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vq_req_free(c2dev, vq_req);
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return err;
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}
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int c2_stag_dealloc(struct c2_dev *c2dev, u32 stag_index)
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{
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struct c2_vq_req *vq_req; /* verbs request object */
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struct c2wr_stag_dealloc_req wr; /* work request */
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struct c2wr_stag_dealloc_rep *reply; /* WR reply */
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int err;
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/*
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* allocate verbs request object
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*/
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vq_req = vq_req_alloc(c2dev);
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if (!vq_req) {
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return -ENOMEM;
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}
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/*
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* Build the WR
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*/
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c2_wr_set_id(&wr, CCWR_STAG_DEALLOC);
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wr.hdr.context = (u64) (unsigned long) vq_req;
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wr.rnic_handle = c2dev->adapter_handle;
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wr.stag_index = cpu_to_be32(stag_index);
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/*
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* reference the request struct. dereferenced in the int handler.
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*/
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vq_req_get(c2dev, vq_req);
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/*
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* Send WR to adapter
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*/
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err = vq_send_wr(c2dev, (union c2wr *) & wr);
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if (err) {
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vq_req_put(c2dev, vq_req);
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goto bail0;
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}
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/*
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* Wait for reply from adapter
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*/
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err = vq_wait_for_reply(c2dev, vq_req);
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if (err) {
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goto bail0;
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}
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/*
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* Process reply
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*/
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reply = (struct c2wr_stag_dealloc_rep *) (unsigned long) vq_req->reply_msg;
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if (!reply) {
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err = -ENOMEM;
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goto bail0;
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}
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err = c2_errno(reply);
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vq_repbuf_free(c2dev, reply);
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bail0:
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vq_req_free(c2dev, vq_req);
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return err;
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}
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