523 lines
15 KiB
C
523 lines
15 KiB
C
/*
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* core_intr.c - DesignWare HS OTG Controller common interrupt handling
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*
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* Copyright (C) 2004-2013 Synopsys, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The names of the above-listed copyright holders may not be used
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* to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file contains the common interrupt handlers
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/usb.h>
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#include <linux/usb/hcd.h>
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#include <linux/usb/ch11.h>
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#include "core.h"
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#include "hcd.h"
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static const char *dwc2_op_state_str(struct dwc2_hsotg *hsotg)
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{
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switch (hsotg->op_state) {
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case OTG_STATE_A_HOST:
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return "a_host";
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case OTG_STATE_A_SUSPEND:
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return "a_suspend";
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case OTG_STATE_A_PERIPHERAL:
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return "a_peripheral";
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case OTG_STATE_B_PERIPHERAL:
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return "b_peripheral";
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case OTG_STATE_B_HOST:
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return "b_host";
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default:
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return "unknown";
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}
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}
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/**
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* dwc2_handle_usb_port_intr - handles OTG PRTINT interrupts.
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* When the PRTINT interrupt fires, there are certain status bits in the Host
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* Port that needs to get cleared.
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*
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* @hsotg: Programming view of DWC_otg controller
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*/
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static void dwc2_handle_usb_port_intr(struct dwc2_hsotg *hsotg)
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{
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u32 hprt0 = readl(hsotg->regs + HPRT0);
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if (hprt0 & HPRT0_ENACHG) {
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hprt0 &= ~HPRT0_ENA;
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writel(hprt0, hsotg->regs + HPRT0);
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}
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/* Clear interrupt */
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writel(GINTSTS_PRTINT, hsotg->regs + GINTSTS);
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}
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/**
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* dwc2_handle_mode_mismatch_intr() - Logs a mode mismatch warning message
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*
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* @hsotg: Programming view of DWC_otg controller
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*/
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static void dwc2_handle_mode_mismatch_intr(struct dwc2_hsotg *hsotg)
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{
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dev_warn(hsotg->dev, "Mode Mismatch Interrupt: currently in %s mode\n",
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dwc2_is_host_mode(hsotg) ? "Host" : "Device");
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/* Clear interrupt */
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writel(GINTSTS_MODEMIS, hsotg->regs + GINTSTS);
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}
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/**
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* dwc2_handle_otg_intr() - Handles the OTG Interrupts. It reads the OTG
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* Interrupt Register (GOTGINT) to determine what interrupt has occurred.
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*
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* @hsotg: Programming view of DWC_otg controller
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*/
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static void dwc2_handle_otg_intr(struct dwc2_hsotg *hsotg)
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{
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u32 gotgint;
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u32 gotgctl;
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u32 gintmsk;
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gotgint = readl(hsotg->regs + GOTGINT);
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gotgctl = readl(hsotg->regs + GOTGCTL);
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dev_dbg(hsotg->dev, "++OTG Interrupt gotgint=%0x [%s]\n", gotgint,
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dwc2_op_state_str(hsotg));
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if (gotgint & GOTGINT_SES_END_DET) {
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dev_dbg(hsotg->dev,
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" ++OTG Interrupt: Session End Detected++ (%s)\n",
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dwc2_op_state_str(hsotg));
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gotgctl = readl(hsotg->regs + GOTGCTL);
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if (dwc2_is_device_mode(hsotg))
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s3c_hsotg_disconnect(hsotg);
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if (hsotg->op_state == OTG_STATE_B_HOST) {
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hsotg->op_state = OTG_STATE_B_PERIPHERAL;
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} else {
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/*
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* If not B_HOST and Device HNP still set, HNP did
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* not succeed!
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*/
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if (gotgctl & GOTGCTL_DEVHNPEN) {
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dev_dbg(hsotg->dev, "Session End Detected\n");
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dev_err(hsotg->dev,
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"Device Not Connected/Responding!\n");
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}
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/*
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* If Session End Detected the B-Cable has been
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* disconnected
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*/
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/* Reset to a clean state */
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hsotg->lx_state = DWC2_L0;
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}
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gotgctl = readl(hsotg->regs + GOTGCTL);
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gotgctl &= ~GOTGCTL_DEVHNPEN;
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writel(gotgctl, hsotg->regs + GOTGCTL);
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}
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if (gotgint & GOTGINT_SES_REQ_SUC_STS_CHNG) {
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dev_dbg(hsotg->dev,
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" ++OTG Interrupt: Session Request Success Status Change++\n");
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gotgctl = readl(hsotg->regs + GOTGCTL);
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if (gotgctl & GOTGCTL_SESREQSCS) {
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if (hsotg->core_params->phy_type ==
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DWC2_PHY_TYPE_PARAM_FS
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&& hsotg->core_params->i2c_enable > 0) {
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hsotg->srp_success = 1;
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} else {
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/* Clear Session Request */
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gotgctl = readl(hsotg->regs + GOTGCTL);
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gotgctl &= ~GOTGCTL_SESREQ;
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writel(gotgctl, hsotg->regs + GOTGCTL);
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}
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}
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}
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if (gotgint & GOTGINT_HST_NEG_SUC_STS_CHNG) {
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/*
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* Print statements during the HNP interrupt handling
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* can cause it to fail
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*/
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gotgctl = readl(hsotg->regs + GOTGCTL);
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/*
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* WA for 3.00a- HW is not setting cur_mode, even sometimes
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* this does not help
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*/
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if (hsotg->hw_params.snpsid >= DWC2_CORE_REV_3_00a)
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udelay(100);
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if (gotgctl & GOTGCTL_HSTNEGSCS) {
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if (dwc2_is_host_mode(hsotg)) {
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hsotg->op_state = OTG_STATE_B_HOST;
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/*
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* Need to disable SOF interrupt immediately.
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* When switching from device to host, the PCD
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* interrupt handler won't handle the interrupt
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* if host mode is already set. The HCD
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* interrupt handler won't get called if the
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* HCD state is HALT. This means that the
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* interrupt does not get handled and Linux
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* complains loudly.
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*/
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gintmsk = readl(hsotg->regs + GINTMSK);
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gintmsk &= ~GINTSTS_SOF;
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writel(gintmsk, hsotg->regs + GINTMSK);
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/*
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* Call callback function with spin lock
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* released
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*/
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spin_unlock(&hsotg->lock);
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/* Initialize the Core for Host mode */
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dwc2_hcd_start(hsotg);
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spin_lock(&hsotg->lock);
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hsotg->op_state = OTG_STATE_B_HOST;
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}
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} else {
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gotgctl = readl(hsotg->regs + GOTGCTL);
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gotgctl &= ~(GOTGCTL_HNPREQ | GOTGCTL_DEVHNPEN);
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writel(gotgctl, hsotg->regs + GOTGCTL);
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dev_dbg(hsotg->dev, "HNP Failed\n");
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dev_err(hsotg->dev,
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"Device Not Connected/Responding\n");
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}
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}
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if (gotgint & GOTGINT_HST_NEG_DET) {
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/*
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* The disconnect interrupt is set at the same time as
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* Host Negotiation Detected. During the mode switch all
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* interrupts are cleared so the disconnect interrupt
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* handler will not get executed.
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*/
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dev_dbg(hsotg->dev,
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" ++OTG Interrupt: Host Negotiation Detected++ (%s)\n",
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(dwc2_is_host_mode(hsotg) ? "Host" : "Device"));
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if (dwc2_is_device_mode(hsotg)) {
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dev_dbg(hsotg->dev, "a_suspend->a_peripheral (%d)\n",
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hsotg->op_state);
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spin_unlock(&hsotg->lock);
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dwc2_hcd_disconnect(hsotg);
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spin_lock(&hsotg->lock);
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hsotg->op_state = OTG_STATE_A_PERIPHERAL;
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} else {
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/* Need to disable SOF interrupt immediately */
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gintmsk = readl(hsotg->regs + GINTMSK);
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gintmsk &= ~GINTSTS_SOF;
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writel(gintmsk, hsotg->regs + GINTMSK);
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spin_unlock(&hsotg->lock);
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dwc2_hcd_start(hsotg);
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spin_lock(&hsotg->lock);
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hsotg->op_state = OTG_STATE_A_HOST;
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}
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}
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if (gotgint & GOTGINT_A_DEV_TOUT_CHG)
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dev_dbg(hsotg->dev,
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" ++OTG Interrupt: A-Device Timeout Change++\n");
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if (gotgint & GOTGINT_DBNCE_DONE)
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dev_dbg(hsotg->dev, " ++OTG Interrupt: Debounce Done++\n");
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/* Clear GOTGINT */
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writel(gotgint, hsotg->regs + GOTGINT);
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}
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/**
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* dwc2_handle_conn_id_status_change_intr() - Handles the Connector ID Status
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* Change Interrupt
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*
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* @hsotg: Programming view of DWC_otg controller
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*
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* Reads the OTG Interrupt Register (GOTCTL) to determine whether this is a
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* Device to Host Mode transition or a Host to Device Mode transition. This only
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* occurs when the cable is connected/removed from the PHY connector.
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*/
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static void dwc2_handle_conn_id_status_change_intr(struct dwc2_hsotg *hsotg)
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{
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u32 gintmsk = readl(hsotg->regs + GINTMSK);
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/* Need to disable SOF interrupt immediately */
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gintmsk &= ~GINTSTS_SOF;
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writel(gintmsk, hsotg->regs + GINTMSK);
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dev_dbg(hsotg->dev, " ++Connector ID Status Change Interrupt++ (%s)\n",
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dwc2_is_host_mode(hsotg) ? "Host" : "Device");
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/*
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* Need to schedule a work, as there are possible DELAY function calls.
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* Release lock before scheduling workq as it holds spinlock during
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* scheduling.
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*/
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if (hsotg->wq_otg) {
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spin_unlock(&hsotg->lock);
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queue_work(hsotg->wq_otg, &hsotg->wf_otg);
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spin_lock(&hsotg->lock);
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}
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/* Clear interrupt */
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writel(GINTSTS_CONIDSTSCHNG, hsotg->regs + GINTSTS);
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}
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/**
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* dwc2_handle_session_req_intr() - This interrupt indicates that a device is
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* initiating the Session Request Protocol to request the host to turn on bus
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* power so a new session can begin
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*
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* @hsotg: Programming view of DWC_otg controller
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*
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* This handler responds by turning on bus power. If the DWC_otg controller is
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* in low power mode, this handler brings the controller out of low power mode
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* before turning on bus power.
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*/
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static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
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{
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dev_dbg(hsotg->dev, "++Session Request Interrupt++\n");
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/* Clear interrupt */
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writel(GINTSTS_SESSREQINT, hsotg->regs + GINTSTS);
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/*
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* Report disconnect if there is any previous session established
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*/
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if (dwc2_is_device_mode(hsotg))
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s3c_hsotg_disconnect(hsotg);
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}
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/*
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* This interrupt indicates that the DWC_otg controller has detected a
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* resume or remote wakeup sequence. If the DWC_otg controller is in
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* low power mode, the handler must brings the controller out of low
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* power mode. The controller automatically begins resume signaling.
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* The handler schedules a time to stop resume signaling.
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*/
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static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
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{
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dev_dbg(hsotg->dev, "++Resume or Remote Wakeup Detected Interrupt++\n");
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dev_dbg(hsotg->dev, "%s lxstate = %d\n", __func__, hsotg->lx_state);
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if (dwc2_is_device_mode(hsotg)) {
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dev_dbg(hsotg->dev, "DSTS=0x%0x\n", readl(hsotg->regs + DSTS));
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if (hsotg->lx_state == DWC2_L2) {
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u32 dctl = readl(hsotg->regs + DCTL);
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/* Clear Remote Wakeup Signaling */
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dctl &= ~DCTL_RMTWKUPSIG;
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writel(dctl, hsotg->regs + DCTL);
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}
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/* Change to L0 state */
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hsotg->lx_state = DWC2_L0;
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} else {
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if (hsotg->lx_state != DWC2_L1) {
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u32 pcgcctl = readl(hsotg->regs + PCGCTL);
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/* Restart the Phy Clock */
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pcgcctl &= ~PCGCTL_STOPPCLK;
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writel(pcgcctl, hsotg->regs + PCGCTL);
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mod_timer(&hsotg->wkp_timer,
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jiffies + msecs_to_jiffies(71));
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} else {
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/* Change to L0 state */
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hsotg->lx_state = DWC2_L0;
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}
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}
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/* Clear interrupt */
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writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
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}
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/*
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* This interrupt indicates that a device has been disconnected from the
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* root port
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*/
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static void dwc2_handle_disconnect_intr(struct dwc2_hsotg *hsotg)
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{
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dev_dbg(hsotg->dev, "++Disconnect Detected Interrupt++ (%s) %s\n",
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dwc2_is_host_mode(hsotg) ? "Host" : "Device",
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dwc2_op_state_str(hsotg));
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/* Change to L3 (OFF) state */
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hsotg->lx_state = DWC2_L3;
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writel(GINTSTS_DISCONNINT, hsotg->regs + GINTSTS);
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}
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/*
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* This interrupt indicates that SUSPEND state has been detected on the USB.
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*
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* For HNP the USB Suspend interrupt signals the change from "a_peripheral"
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* to "a_host".
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*
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* When power management is enabled the core will be put in low power mode.
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*/
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static void dwc2_handle_usb_suspend_intr(struct dwc2_hsotg *hsotg)
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{
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u32 dsts;
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dev_dbg(hsotg->dev, "USB SUSPEND\n");
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if (dwc2_is_device_mode(hsotg)) {
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/*
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* Check the Device status register to determine if the Suspend
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* state is active
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*/
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dsts = readl(hsotg->regs + DSTS);
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dev_dbg(hsotg->dev, "DSTS=0x%0x\n", dsts);
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dev_dbg(hsotg->dev,
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"DSTS.Suspend Status=%d HWCFG4.Power Optimize=%d\n",
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!!(dsts & DSTS_SUSPSTS),
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hsotg->hw_params.power_optimized);
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} else {
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if (hsotg->op_state == OTG_STATE_A_PERIPHERAL) {
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dev_dbg(hsotg->dev, "a_peripheral->a_host\n");
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/* Clear the a_peripheral flag, back to a_host */
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spin_unlock(&hsotg->lock);
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dwc2_hcd_start(hsotg);
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spin_lock(&hsotg->lock);
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hsotg->op_state = OTG_STATE_A_HOST;
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}
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}
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/* Change to L2 (suspend) state */
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hsotg->lx_state = DWC2_L2;
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/* Clear interrupt */
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writel(GINTSTS_USBSUSP, hsotg->regs + GINTSTS);
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}
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#define GINTMSK_COMMON (GINTSTS_WKUPINT | GINTSTS_SESSREQINT | \
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GINTSTS_CONIDSTSCHNG | GINTSTS_OTGINT | \
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GINTSTS_MODEMIS | GINTSTS_DISCONNINT | \
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GINTSTS_USBSUSP | GINTSTS_PRTINT)
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/*
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* This function returns the Core Interrupt register
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*/
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static u32 dwc2_read_common_intr(struct dwc2_hsotg *hsotg)
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{
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u32 gintsts;
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u32 gintmsk;
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u32 gahbcfg;
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u32 gintmsk_common = GINTMSK_COMMON;
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gintsts = readl(hsotg->regs + GINTSTS);
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gintmsk = readl(hsotg->regs + GINTMSK);
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gahbcfg = readl(hsotg->regs + GAHBCFG);
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/* If any common interrupts set */
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if (gintsts & gintmsk_common)
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dev_dbg(hsotg->dev, "gintsts=%08x gintmsk=%08x\n",
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gintsts, gintmsk);
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if (gahbcfg & GAHBCFG_GLBL_INTR_EN)
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return gintsts & gintmsk & gintmsk_common;
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else
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return 0;
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}
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/*
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* Common interrupt handler
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*
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* The common interrupts are those that occur in both Host and Device mode.
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* This handler handles the following interrupts:
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* - Mode Mismatch Interrupt
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|
* - OTG Interrupt
|
|
* - Connector ID Status Change Interrupt
|
|
* - Disconnect Interrupt
|
|
* - Session Request Interrupt
|
|
* - Resume / Remote Wakeup Detected Interrupt
|
|
* - Suspend Interrupt
|
|
*/
|
|
irqreturn_t dwc2_handle_common_intr(int irq, void *dev)
|
|
{
|
|
struct dwc2_hsotg *hsotg = dev;
|
|
u32 gintsts;
|
|
irqreturn_t retval = IRQ_NONE;
|
|
|
|
spin_lock(&hsotg->lock);
|
|
|
|
if (!dwc2_is_controller_alive(hsotg)) {
|
|
dev_warn(hsotg->dev, "Controller is dead\n");
|
|
goto out;
|
|
}
|
|
|
|
gintsts = dwc2_read_common_intr(hsotg);
|
|
if (gintsts & ~GINTSTS_PRTINT)
|
|
retval = IRQ_HANDLED;
|
|
|
|
if (gintsts & GINTSTS_MODEMIS)
|
|
dwc2_handle_mode_mismatch_intr(hsotg);
|
|
if (gintsts & GINTSTS_OTGINT)
|
|
dwc2_handle_otg_intr(hsotg);
|
|
if (gintsts & GINTSTS_CONIDSTSCHNG)
|
|
dwc2_handle_conn_id_status_change_intr(hsotg);
|
|
if (gintsts & GINTSTS_DISCONNINT)
|
|
dwc2_handle_disconnect_intr(hsotg);
|
|
if (gintsts & GINTSTS_SESSREQINT)
|
|
dwc2_handle_session_req_intr(hsotg);
|
|
if (gintsts & GINTSTS_WKUPINT)
|
|
dwc2_handle_wakeup_detected_intr(hsotg);
|
|
if (gintsts & GINTSTS_USBSUSP)
|
|
dwc2_handle_usb_suspend_intr(hsotg);
|
|
|
|
if (gintsts & GINTSTS_PRTINT) {
|
|
/*
|
|
* The port interrupt occurs while in device mode with HPRT0
|
|
* Port Enable/Disable
|
|
*/
|
|
if (dwc2_is_device_mode(hsotg)) {
|
|
dev_dbg(hsotg->dev,
|
|
" --Port interrupt received in Device mode--\n");
|
|
dwc2_handle_usb_port_intr(hsotg);
|
|
retval = IRQ_HANDLED;
|
|
}
|
|
}
|
|
|
|
out:
|
|
spin_unlock(&hsotg->lock);
|
|
return retval;
|
|
}
|
|
EXPORT_SYMBOL_GPL(dwc2_handle_common_intr);
|