Lad Prabhakar e41cb21793 clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) ... VSP1 instances VSPS (which stands for "VSP Standard") and VSPR (which stands for "VSP for Resizing") were wrongly named as "vsp1-sy" and "vsp1-rt". The clock section in the SoC datasheets misunderstood the abbreviations as meaning VSP System and VSP Realtime, and named the corresponding clocks VSP1(SY) and VSP1(RT). This mistake has been carried over to the kernel code. This patch fixes this by renaming the clock names to "vsps" and "vspr". Inspired from commit 79ea9934b8 ("ARM: shmobile: r8a7790: Rename VSP1_(SY|RT) clocks to VSP1_(S|R)") Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20200831183722.8165-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>		2020-09-04 09:42:01 +02:00
..
Kconfig	clk: renesas: cpg-mssr: Add r8a774e1 support	2020-07-13 10:36:33 +02:00
Makefile	clk: renesas: cpg-mssr: Add r8a774e1 support	2020-07-13 10:36:33 +02:00
clk-div6.c	clk: renesas: div6: Combine clock-private and parent array allocation	2019-06-20 11:36:29 +02:00
clk-div6.h	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
clk-emev2.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-mstp.c	clk: renesas: mstp: Delete unnecessary kfree() in cpg_mstp_clocks_init()	2019-10-01 09:50:28 +02:00
clk-r8a73a4.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
clk-r8a7740.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
clk-r8a7778.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-r8a7779.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-rz.c	remove ioremap_nocache and devm_ioremap_nocache	2020-01-06 09:45:59 +01:00
clk-sh73a0.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
r7s9210-cpg-mssr.c	clk: renesas: r7s9210: Add SPIBSC clock	2019-12-20 15:03:27 +01:00
r8a774a1-cpg-mssr.c	clk: renesas: rzg2: Mark RWDT clocks as critical	2020-06-22 16:54:32 +02:00
r8a774b1-cpg-mssr.c	clk: renesas: rzg2: Mark RWDT clocks as critical	2020-06-22 16:54:32 +02:00
r8a774c0-cpg-mssr.c	clk: renesas: rzg2: Mark RWDT clocks as critical	2020-06-22 16:54:32 +02:00
r8a774e1-cpg-mssr.c	clk: renesas: cpg-mssr: Add r8a774e1 support	2020-07-13 10:36:33 +02:00
r8a7742-cpg-mssr.c	clk: renesas: r8a7742: Add clk entry for VSPR	2020-09-04 09:42:01 +02:00
r8a7743-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7745-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7790-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7791-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7792-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7794-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7795-cpg-mssr.c	clk: renesas: rcar-gen3: Mark RWDT clocks as critical	2020-06-22 16:53:49 +02:00
r8a7796-cpg-mssr.c	clk: renesas: rcar-gen3: Mark RWDT clocks as critical	2020-06-22 16:53:49 +02:00
r8a77470-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a77965-cpg-mssr.c	clk: renesas: rcar-gen3: Mark RWDT clocks as critical	2020-06-22 16:53:49 +02:00
r8a77970-cpg-mssr.c	clk: renesas: rcar-gen3: Mark RWDT clocks as critical	2020-06-22 16:53:49 +02:00
r8a77980-cpg-mssr.c	clk: renesas: rcar-gen3: Mark RWDT clocks as critical	2020-06-22 16:53:49 +02:00
r8a77990-cpg-mssr.c	clk: renesas: rcar-gen3: Mark RWDT clocks as critical	2020-06-22 16:53:49 +02:00
r8a77995-cpg-mssr.c	clk: renesas: rcar-gen3: Mark RWDT clocks as critical	2020-06-22 16:53:49 +02:00
r9a06g032-clocks.c	clk: renesas: r9a06g032: Fix some typo in comments	2020-04-14 09:22:16 +02:00
rcar-gen2-cpg.c	clk: renesas: rcar-gen2: Switch Z clock to .determine_rate()	2019-10-21 09:53:43 +02:00
rcar-gen2-cpg.h	clk: renesas: rcar-gen2: Change multipliers and dividers to u8	2019-12-10 10:24:10 +01:00
rcar-gen3-cpg.c	clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocks	2019-12-20 15:02:15 +01:00
rcar-gen3-cpg.h	Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and 'clk-spdx' into clk-next	2019-05-07 11:45:29 -07:00
rcar-usb2-clock-sel.c	clk: renesas: rcar-usb2-clock-sel: Add reset_control	2020-03-09 09:29:58 +01:00
renesas-cpg-mssr.c	clk: renesas: cpg-mssr: Add r8a774e1 support	2020-07-13 10:36:33 +02:00
renesas-cpg-mssr.h	clk: renesas: cpg-mssr: Add r8a774e1 support	2020-07-13 10:36:33 +02:00