267 lines
6.2 KiB
C
267 lines
6.2 KiB
C
/*
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* Cavium ThunderX i2c driver.
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*
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* Copyright (C) 2015,2016 Cavium Inc.
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* Authors: Fred Martin <fmartin@caviumnetworks.com>
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* Jan Glauber <jglauber@cavium.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/acpi.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/i2c-smbus.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_irq.h>
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#include <linux/pci.h>
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#include "i2c-octeon-core.h"
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#define DRV_NAME "i2c-thunderx"
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#define PCI_DEVICE_ID_THUNDER_TWSI 0xa012
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#define SYS_FREQ_DEFAULT 700000000
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#define TWSI_INT_ENA_W1C 0x1028
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#define TWSI_INT_ENA_W1S 0x1030
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/*
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* Enable the CORE interrupt.
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* The interrupt will be asserted when there is non-STAT_IDLE state in the
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* SW_TWSI_EOP_TWSI_STAT register.
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*/
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static void thunder_i2c_int_enable(struct octeon_i2c *i2c)
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{
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octeon_i2c_writeq_flush(TWSI_INT_CORE_INT,
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i2c->twsi_base + TWSI_INT_ENA_W1S);
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}
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/*
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* Disable the CORE interrupt.
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*/
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static void thunder_i2c_int_disable(struct octeon_i2c *i2c)
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{
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octeon_i2c_writeq_flush(TWSI_INT_CORE_INT,
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i2c->twsi_base + TWSI_INT_ENA_W1C);
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}
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static void thunder_i2c_hlc_int_enable(struct octeon_i2c *i2c)
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{
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octeon_i2c_writeq_flush(TWSI_INT_ST_INT | TWSI_INT_TS_INT,
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i2c->twsi_base + TWSI_INT_ENA_W1S);
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}
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static void thunder_i2c_hlc_int_disable(struct octeon_i2c *i2c)
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{
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octeon_i2c_writeq_flush(TWSI_INT_ST_INT | TWSI_INT_TS_INT,
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i2c->twsi_base + TWSI_INT_ENA_W1C);
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}
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static u32 thunderx_i2c_functionality(struct i2c_adapter *adap)
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{
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return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK) |
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I2C_FUNC_SMBUS_READ_BLOCK_DATA | I2C_SMBUS_BLOCK_PROC_CALL;
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}
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static const struct i2c_algorithm thunderx_i2c_algo = {
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.master_xfer = octeon_i2c_xfer,
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.functionality = thunderx_i2c_functionality,
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};
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static struct i2c_adapter thunderx_i2c_ops = {
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.owner = THIS_MODULE,
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.name = "ThunderX adapter",
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.algo = &thunderx_i2c_algo,
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};
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static void thunder_i2c_clock_enable(struct device *dev, struct octeon_i2c *i2c)
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{
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int ret;
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if (acpi_disabled) {
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/* DT */
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i2c->clk = clk_get(dev, NULL);
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if (IS_ERR(i2c->clk)) {
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i2c->clk = NULL;
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goto skip;
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}
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ret = clk_prepare_enable(i2c->clk);
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if (ret)
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goto skip;
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i2c->sys_freq = clk_get_rate(i2c->clk);
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} else {
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/* ACPI */
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device_property_read_u32(dev, "sclk", &i2c->sys_freq);
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}
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skip:
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if (!i2c->sys_freq)
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i2c->sys_freq = SYS_FREQ_DEFAULT;
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}
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static void thunder_i2c_clock_disable(struct device *dev, struct clk *clk)
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{
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if (!clk)
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return;
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clk_disable_unprepare(clk);
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clk_put(clk);
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}
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static int thunder_i2c_smbus_setup_of(struct octeon_i2c *i2c,
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struct device_node *node)
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{
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u32 type;
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if (!node)
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return -EINVAL;
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i2c->alert_data.irq = irq_of_parse_and_map(node, 0);
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if (!i2c->alert_data.irq)
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return -EINVAL;
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type = irqd_get_trigger_type(irq_get_irq_data(i2c->alert_data.irq));
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i2c->alert_data.alert_edge_triggered =
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(type & IRQ_TYPE_LEVEL_MASK) ? 1 : 0;
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i2c->ara = i2c_setup_smbus_alert(&i2c->adap, &i2c->alert_data);
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if (!i2c->ara)
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return -ENODEV;
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return 0;
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}
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static int thunder_i2c_smbus_setup(struct octeon_i2c *i2c,
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struct device_node *node)
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{
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/* TODO: ACPI support */
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if (!acpi_disabled)
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return -EOPNOTSUPP;
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return thunder_i2c_smbus_setup_of(i2c, node);
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}
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static void thunder_i2c_smbus_remove(struct octeon_i2c *i2c)
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{
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if (i2c->ara)
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i2c_unregister_device(i2c->ara);
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}
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static int thunder_i2c_probe_pci(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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struct device *dev = &pdev->dev;
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struct octeon_i2c *i2c;
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int ret;
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i2c = devm_kzalloc(dev, sizeof(*i2c), GFP_KERNEL);
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if (!i2c)
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return -ENOMEM;
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i2c->roff.sw_twsi = 0x1000;
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i2c->roff.twsi_int = 0x1010;
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i2c->roff.sw_twsi_ext = 0x1018;
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i2c->dev = dev;
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pci_set_drvdata(pdev, i2c);
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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ret = pci_request_regions(pdev, DRV_NAME);
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if (ret)
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return ret;
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i2c->twsi_base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
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if (!i2c->twsi_base)
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return -EINVAL;
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thunder_i2c_clock_enable(dev, i2c);
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ret = device_property_read_u32(dev, "clock-frequency", &i2c->twsi_freq);
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if (ret)
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i2c->twsi_freq = 100000;
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init_waitqueue_head(&i2c->queue);
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i2c->int_enable = thunder_i2c_int_enable;
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i2c->int_disable = thunder_i2c_int_disable;
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i2c->hlc_int_enable = thunder_i2c_hlc_int_enable;
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i2c->hlc_int_disable = thunder_i2c_hlc_int_disable;
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ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSIX);
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if (ret < 0)
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goto error;
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ret = devm_request_irq(dev, pci_irq_vector(pdev, 0), octeon_i2c_isr, 0,
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DRV_NAME, i2c);
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if (ret)
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goto error;
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ret = octeon_i2c_init_lowlevel(i2c);
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if (ret)
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goto error;
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octeon_i2c_set_clock(i2c);
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i2c->adap = thunderx_i2c_ops;
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i2c->adap.retries = 5;
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i2c->adap.class = I2C_CLASS_HWMON;
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i2c->adap.bus_recovery_info = &octeon_i2c_recovery_info;
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i2c->adap.dev.parent = dev;
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i2c->adap.dev.of_node = pdev->dev.of_node;
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snprintf(i2c->adap.name, sizeof(i2c->adap.name),
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"Cavium ThunderX i2c adapter at %s", dev_name(dev));
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i2c_set_adapdata(&i2c->adap, i2c);
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ret = i2c_add_adapter(&i2c->adap);
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if (ret)
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goto error;
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dev_info(i2c->dev, "Probed. Set system clock to %u\n", i2c->sys_freq);
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ret = thunder_i2c_smbus_setup(i2c, pdev->dev.of_node);
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if (ret)
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dev_info(dev, "SMBUS alert not active on this bus\n");
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return 0;
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error:
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thunder_i2c_clock_disable(dev, i2c->clk);
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return ret;
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}
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static void thunder_i2c_remove_pci(struct pci_dev *pdev)
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{
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struct octeon_i2c *i2c = pci_get_drvdata(pdev);
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thunder_i2c_smbus_remove(i2c);
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thunder_i2c_clock_disable(&pdev->dev, i2c->clk);
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i2c_del_adapter(&i2c->adap);
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}
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static const struct pci_device_id thunder_i2c_pci_id_table[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_TWSI) },
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci, thunder_i2c_pci_id_table);
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static struct pci_driver thunder_i2c_pci_driver = {
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.name = DRV_NAME,
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.id_table = thunder_i2c_pci_id_table,
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.probe = thunder_i2c_probe_pci,
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.remove = thunder_i2c_remove_pci,
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};
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module_pci_driver(thunder_i2c_pci_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Fred Martin <fmartin@caviumnetworks.com>");
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MODULE_DESCRIPTION("I2C-Bus adapter for Cavium ThunderX SOC");
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