291 lines
7.4 KiB
C
291 lines
7.4 KiB
C
/*
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* Copyright (c) 2010-2011 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef ATH9K_HW_OPS_H
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#define ATH9K_HW_OPS_H
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#include "hw.h"
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/* Hardware core and driver accessible callbacks */
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static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
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bool power_off)
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{
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if (!ah->aspm_enabled)
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return;
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ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off);
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}
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static inline void ath9k_hw_rxena(struct ath_hw *ah)
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{
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ath9k_hw_ops(ah)->rx_enable(ah);
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}
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static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds,
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u32 link)
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{
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ath9k_hw_ops(ah)->set_desc_link(ds, link);
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}
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static inline int ath9k_hw_calibrate(struct ath_hw *ah,
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struct ath9k_channel *chan,
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u8 rxchainmask, bool longcal)
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{
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return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal);
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}
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static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked,
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u32 *sync_cause_p)
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{
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return ath9k_hw_ops(ah)->get_isr(ah, masked, sync_cause_p);
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}
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static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds,
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struct ath_tx_info *i)
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{
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return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i);
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}
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static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
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struct ath_tx_status *ts)
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{
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return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
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}
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static inline int ath9k_hw_get_duration(struct ath_hw *ah, const void *ds,
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int index)
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{
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return ath9k_hw_ops(ah)->get_duration(ah, ds, index);
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}
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static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
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struct ath_hw_antcomb_conf *antconf)
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{
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ath9k_hw_ops(ah)->antdiv_comb_conf_get(ah, antconf);
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}
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static inline void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah,
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struct ath_hw_antcomb_conf *antconf)
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{
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ath9k_hw_ops(ah)->antdiv_comb_conf_set(ah, antconf);
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}
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static inline void ath9k_hw_tx99_start(struct ath_hw *ah, u32 qnum)
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{
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ath9k_hw_ops(ah)->tx99_start(ah, qnum);
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}
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static inline void ath9k_hw_tx99_stop(struct ath_hw *ah)
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{
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ath9k_hw_ops(ah)->tx99_stop(ah);
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}
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static inline void ath9k_hw_tx99_set_txpower(struct ath_hw *ah, u8 power)
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{
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if (ath9k_hw_ops(ah)->tx99_set_txpower)
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ath9k_hw_ops(ah)->tx99_set_txpower(ah, power);
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}
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#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
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static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable)
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{
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if (ath9k_hw_ops(ah)->set_bt_ant_diversity)
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ath9k_hw_ops(ah)->set_bt_ant_diversity(ah, enable);
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}
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static inline bool ath9k_hw_is_aic_enabled(struct ath_hw *ah)
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{
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if (ath9k_hw_private_ops(ah)->is_aic_enabled)
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return ath9k_hw_private_ops(ah)->is_aic_enabled(ah);
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return false;
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}
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#endif
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/* Private hardware call ops */
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static inline void ath9k_hw_init_hang_checks(struct ath_hw *ah)
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{
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ath9k_hw_private_ops(ah)->init_hang_checks(ah);
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}
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static inline bool ath9k_hw_detect_mac_hang(struct ath_hw *ah)
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{
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return ath9k_hw_private_ops(ah)->detect_mac_hang(ah);
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}
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static inline bool ath9k_hw_detect_bb_hang(struct ath_hw *ah)
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{
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return ath9k_hw_private_ops(ah)->detect_bb_hang(ah);
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}
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/* PHY ops */
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static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan);
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}
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static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
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}
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static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
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struct ath9k_channel *chan,
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u16 modesIndex)
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{
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if (!ath9k_hw_private_ops(ah)->set_rf_regs)
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return true;
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return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex);
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}
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static inline void ath9k_hw_init_bb(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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return ath9k_hw_private_ops(ah)->init_bb(ah, chan);
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}
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static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan);
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}
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static inline int ath9k_hw_process_ini(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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return ath9k_hw_private_ops(ah)->process_ini(ah, chan);
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}
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static inline void ath9k_olc_init(struct ath_hw *ah)
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{
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if (!ath9k_hw_private_ops(ah)->olc_init)
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return;
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return ath9k_hw_private_ops(ah)->olc_init(ah);
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}
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static inline void ath9k_hw_set_rfmode(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan);
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}
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static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah)
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{
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return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah);
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}
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static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan);
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}
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static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah)
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{
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return ath9k_hw_private_ops(ah)->rfbus_req(ah);
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}
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static inline void ath9k_hw_rfbus_done(struct ath_hw *ah)
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{
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return ath9k_hw_private_ops(ah)->rfbus_done(ah);
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}
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static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
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{
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if (!ath9k_hw_private_ops(ah)->restore_chainmask)
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return;
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return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
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}
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static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
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enum ath9k_ani_cmd cmd, int param)
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{
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return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param);
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}
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static inline void ath9k_hw_do_getnf(struct ath_hw *ah,
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int16_t nfarray[NUM_NF_READINGS])
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{
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ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray);
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}
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static inline bool ath9k_hw_init_cal(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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return ath9k_hw_private_ops(ah)->init_cal(ah, chan);
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}
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static inline void ath9k_hw_setup_calibration(struct ath_hw *ah,
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struct ath9k_cal_list *currCal)
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{
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ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal);
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}
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static inline int ath9k_hw_fast_chan_change(struct ath_hw *ah,
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struct ath9k_channel *chan,
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u8 *ini_reloaded)
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{
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return ath9k_hw_private_ops(ah)->fast_chan_change(ah, chan,
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ini_reloaded);
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}
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static inline void ath9k_hw_set_radar_params(struct ath_hw *ah)
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{
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if (!ath9k_hw_private_ops(ah)->set_radar_params)
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return;
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ath9k_hw_private_ops(ah)->set_radar_params(ah, &ah->radar_conf);
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}
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static inline void ath9k_hw_init_cal_settings(struct ath_hw *ah)
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{
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ath9k_hw_private_ops(ah)->init_cal_settings(ah);
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}
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static inline u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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return ath9k_hw_private_ops(ah)->compute_pll_control(ah, chan);
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}
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static inline void ath9k_hw_init_mode_gain_regs(struct ath_hw *ah)
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{
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if (!ath9k_hw_private_ops(ah)->init_mode_gain_regs)
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return;
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ath9k_hw_private_ops(ah)->init_mode_gain_regs(ah);
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}
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static inline void ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah)
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{
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if (!ath9k_hw_private_ops(ah)->ani_cache_ini_regs)
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return;
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ath9k_hw_private_ops(ah)->ani_cache_ini_regs(ah);
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}
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#endif /* ATH9K_HW_OPS_H */
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