47 lines
1.8 KiB
Plaintext
47 lines
1.8 KiB
Plaintext
#
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# Loongson Processors' Support
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#
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cflags-$(CONFIG_CPU_LOONGSON2EF) += -Wa,--trap
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cflags-$(CONFIG_CPU_LOONGSON2E) += -march=loongson2e
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cflags-$(CONFIG_CPU_LOONGSON2F) += -march=loongson2f
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#
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# Some versions of binutils, not currently mainline as of 2019/02/04, support
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# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction
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# to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a
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# description).
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#
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# We disable this in order to prevent the assembler meddling with the
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# instruction that labels refer to, ie. if we label an ll instruction:
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#
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# 1: ll v0, 0(a0)
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#
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# ...then with the assembler fix applied the label may actually point at a sync
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# instruction inserted by the assembler, and if we were using the label in an
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# exception table the table would no longer contain the address of the ll
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# instruction.
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#
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# Avoid this by explicitly disabling that assembler behaviour. If upstream
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# binutils does not merge support for the flag then we can revisit & remove
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# this later - for now it ensures vendor toolchains don't cause problems.
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#
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cflags-$(CONFIG_CPU_LOONGSON2EF) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
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# Enable the workarounds for Loongson2f
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ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS
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cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa,-mfix-loongson2f-nop
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cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa,-mfix-loongson2f-jump
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endif
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# Some -march= flags enable MMI instructions, and GCC complains about that
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# support being enabled alongside -msoft-float. Thus explicitly disable MMI.
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cflags-y += $(call cc-option,-mno-loongson-mmi)
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#
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# Loongson Machines' Support
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#
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cflags-$(CONFIG_MACH_LOONGSON2EF) += -I$(srctree)/arch/mips/include/asm/mach-loongson2ef -mno-branch-likely
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load-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000
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load-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000
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