282 lines
9.2 KiB
C
282 lines
9.2 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
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*
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* Portions of this file are derived from the ipw3945 project, as well
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* as portions of the ieee80211 subsystem header files.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* Intel Linux Wireless <ilw@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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*****************************************************************************/
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#include <linux/etherdevice.h>
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#include <linux/slab.h>
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#include <net/mac80211.h>
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#include <asm/unaligned.h>
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#include "iwl-eeprom.h"
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#include "iwl-dev.h"
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#include "iwl-core.h"
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#include "iwl-sta.h"
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#include "iwl-io.h"
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#include "iwl-helpers.h"
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/************************** RX-FUNCTIONS ****************************/
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/*
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* Rx theory of operation
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*
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* Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
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* each of which point to Receive Buffers to be filled by the NIC. These get
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* used not only for Rx frames, but for any command response or notification
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* from the NIC. The driver and NIC manage the Rx buffers by means
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* of indexes into the circular buffer.
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*
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* Rx Queue Indexes
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* The host/firmware share two index registers for managing the Rx buffers.
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*
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* The READ index maps to the first position that the firmware may be writing
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* to -- the driver can read up to (but not including) this position and get
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* good data.
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* The READ index is managed by the firmware once the card is enabled.
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*
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* The WRITE index maps to the last position the driver has read from -- the
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* position preceding WRITE is the last slot the firmware can place a packet.
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*
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* The queue is empty (no good data) if WRITE = READ - 1, and is full if
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* WRITE = READ.
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*
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* During initialization, the host sets up the READ queue position to the first
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* INDEX position, and WRITE to the last (READ - 1 wrapped)
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*
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* When the firmware places a packet in a buffer, it will advance the READ index
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* and fire the RX interrupt. The driver can then query the READ index and
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* process as many packets as possible, moving the WRITE index forward as it
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* resets the Rx queue buffers with new memory.
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*
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* The management in the driver is as follows:
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* + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
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* iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
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* to replenish the iwl->rxq->rx_free.
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* + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
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* iwl->rxq is replenished and the READ INDEX is updated (updating the
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* 'processed' and 'read' driver indexes as well)
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* + A received packet is processed and handed to the kernel network stack,
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* detached from the iwl->rxq. The driver 'processed' index is updated.
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* + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
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* list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
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* INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
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* were enough free buffers and RX_STALLED is set it is cleared.
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*
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*
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* Driver sequence:
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*
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* iwl_legacy_rx_queue_alloc() Allocates rx_free
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* iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
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* iwl_rx_queue_restock
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* iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
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* queue, updates firmware pointers, and updates
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* the WRITE index. If insufficient rx_free buffers
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* are available, schedules iwl_rx_replenish
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*
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* -- enable interrupts --
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* ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
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* READ INDEX, detaching the SKB from the pool.
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* Moves the packet buffer from queue to rx_used.
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* Calls iwl_rx_queue_restock to refill any empty
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* slots.
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* ...
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*
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*/
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/**
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* iwl_legacy_rx_queue_space - Return number of free slots available in queue.
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*/
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int iwl_legacy_rx_queue_space(const struct iwl_rx_queue *q)
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{
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int s = q->read - q->write;
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if (s <= 0)
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s += RX_QUEUE_SIZE;
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/* keep some buffer to not confuse full and empty queue */
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s -= 2;
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if (s < 0)
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s = 0;
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return s;
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}
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EXPORT_SYMBOL(iwl_legacy_rx_queue_space);
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/**
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* iwl_legacy_rx_queue_update_write_ptr - Update the write pointer for the RX queue
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*/
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void
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iwl_legacy_rx_queue_update_write_ptr(struct iwl_priv *priv,
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struct iwl_rx_queue *q)
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{
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unsigned long flags;
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u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
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u32 reg;
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spin_lock_irqsave(&q->lock, flags);
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if (q->need_update == 0)
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goto exit_unlock;
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/* If power-saving is in use, make sure device is awake */
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if (test_bit(STATUS_POWER_PMI, &priv->status)) {
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reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
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if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
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IWL_DEBUG_INFO(priv,
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"Rx queue requesting wakeup,"
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" GP1 = 0x%x\n", reg);
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iwl_legacy_set_bit(priv, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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goto exit_unlock;
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}
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q->write_actual = (q->write & ~0x7);
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iwl_legacy_write_direct32(priv, rx_wrt_ptr_reg,
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q->write_actual);
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/* Else device is assumed to be awake */
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} else {
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/* Device expects a multiple of 8 */
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q->write_actual = (q->write & ~0x7);
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iwl_legacy_write_direct32(priv, rx_wrt_ptr_reg,
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q->write_actual);
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}
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q->need_update = 0;
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exit_unlock:
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spin_unlock_irqrestore(&q->lock, flags);
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}
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EXPORT_SYMBOL(iwl_legacy_rx_queue_update_write_ptr);
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int iwl_legacy_rx_queue_alloc(struct iwl_priv *priv)
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{
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struct iwl_rx_queue *rxq = &priv->rxq;
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struct device *dev = &priv->pci_dev->dev;
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int i;
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spin_lock_init(&rxq->lock);
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INIT_LIST_HEAD(&rxq->rx_free);
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INIT_LIST_HEAD(&rxq->rx_used);
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/* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
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rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
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GFP_KERNEL);
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if (!rxq->bd)
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goto err_bd;
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rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status),
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&rxq->rb_stts_dma, GFP_KERNEL);
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if (!rxq->rb_stts)
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goto err_rb;
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/* Fill the rx_used queue with _all_ of the Rx buffers */
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for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
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list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
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/* Set us so that we have processed and used all buffers, but have
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* not restocked the Rx queue with fresh buffers */
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rxq->read = rxq->write = 0;
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rxq->write_actual = 0;
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rxq->free_count = 0;
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rxq->need_update = 0;
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return 0;
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err_rb:
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dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
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rxq->bd_dma);
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err_bd:
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return -ENOMEM;
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}
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EXPORT_SYMBOL(iwl_legacy_rx_queue_alloc);
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void iwl_legacy_rx_spectrum_measure_notif(struct iwl_priv *priv,
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struct iwl_rx_mem_buffer *rxb)
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{
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struct iwl_rx_packet *pkt = rxb_addr(rxb);
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struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
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if (!report->state) {
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IWL_DEBUG_11H(priv,
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"Spectrum Measure Notification: Start\n");
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return;
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}
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memcpy(&priv->measure_report, report, sizeof(*report));
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priv->measurement_status |= MEASUREMENT_READY;
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}
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EXPORT_SYMBOL(iwl_legacy_rx_spectrum_measure_notif);
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/*
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* returns non-zero if packet should be dropped
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*/
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int iwl_legacy_set_decrypted_flag(struct iwl_priv *priv,
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struct ieee80211_hdr *hdr,
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u32 decrypt_res,
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struct ieee80211_rx_status *stats)
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{
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u16 fc = le16_to_cpu(hdr->frame_control);
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/*
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* All contexts have the same setting here due to it being
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* a module parameter, so OK to check any context.
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*/
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if (priv->contexts[IWL_RXON_CTX_BSS].active.filter_flags &
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RXON_FILTER_DIS_DECRYPT_MSK)
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return 0;
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if (!(fc & IEEE80211_FCTL_PROTECTED))
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return 0;
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IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
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switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
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case RX_RES_STATUS_SEC_TYPE_TKIP:
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/* The uCode has got a bad phase 1 Key, pushes the packet.
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* Decryption will be done in SW. */
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if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
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RX_RES_STATUS_BAD_KEY_TTAK)
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break;
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case RX_RES_STATUS_SEC_TYPE_WEP:
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if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
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RX_RES_STATUS_BAD_ICV_MIC) {
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/* bad ICV, the packet is destroyed since the
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* decryption is inplace, drop it */
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IWL_DEBUG_RX(priv, "Packet destroyed\n");
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return -1;
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}
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case RX_RES_STATUS_SEC_TYPE_CCMP:
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if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
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RX_RES_STATUS_DECRYPT_OK) {
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IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
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stats->flag |= RX_FLAG_DECRYPTED;
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}
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break;
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default:
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break;
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}
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return 0;
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}
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EXPORT_SYMBOL(iwl_legacy_set_decrypted_flag);
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