157 lines
3.5 KiB
Plaintext
157 lines
3.5 KiB
Plaintext
/*
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* Samsung's Exynos4412 SoC device tree source
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412
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* based board files can include this file and provide values for board specfic
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* bindings.
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*
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* Note: This file does not include device nodes for all the controllers in
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* Exynos4412 SoC. As device tree coverage for Exynos4412 increases, additional
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* nodes can be added to this file.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "exynos4x12.dtsi"
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/ {
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compatible = "samsung,exynos4412", "samsung,exynos4";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@A00 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <0xA00>;
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clocks = <&clock CLK_ARM_CLK>;
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clock-names = "cpu";
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operating-points-v2 = <&cpu0_opp_table>;
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cooling-min-level = <13>;
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cooling-max-level = <7>;
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#cooling-cells = <2>; /* min followed by max */
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};
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cpu@A01 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <0xA01>;
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operating-points-v2 = <&cpu0_opp_table>;
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};
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cpu@A02 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <0xA02>;
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operating-points-v2 = <&cpu0_opp_table>;
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};
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cpu@A03 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <0xA03>;
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operating-points-v2 = <&cpu0_opp_table>;
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};
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};
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cpu0_opp_table: opp_table0 {
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compatible = "operating-points-v2";
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opp-shared;
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opp@200000000 {
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opp-hz = /bits/ 64 <200000000>;
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opp-microvolt = <900000>;
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clock-latency-ns = <200000>;
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};
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opp@300000000 {
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opp-hz = /bits/ 64 <300000000>;
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opp-microvolt = <900000>;
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clock-latency-ns = <200000>;
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};
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opp@400000000 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <925000>;
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clock-latency-ns = <200000>;
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};
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opp@500000000 {
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opp-hz = /bits/ 64 <500000000>;
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opp-microvolt = <950000>;
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clock-latency-ns = <200000>;
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};
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opp@600000000 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <975000>;
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clock-latency-ns = <200000>;
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};
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opp@700000000 {
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opp-hz = /bits/ 64 <700000000>;
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opp-microvolt = <987500>;
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clock-latency-ns = <200000>;
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};
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opp@800000000 {
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opp-hz = /bits/ 64 <800000000>;
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opp-microvolt = <1000000>;
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clock-latency-ns = <200000>;
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opp-suspend;
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};
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opp@900000000 {
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opp-hz = /bits/ 64 <900000000>;
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opp-microvolt = <1037500>;
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clock-latency-ns = <200000>;
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};
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opp@1000000000 {
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opp-hz = /bits/ 64 <1000000000>;
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opp-microvolt = <1087500>;
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clock-latency-ns = <200000>;
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};
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opp@1100000000 {
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opp-hz = /bits/ 64 <1100000000>;
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opp-microvolt = <1137500>;
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clock-latency-ns = <200000>;
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};
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opp@1200000000 {
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opp-hz = /bits/ 64 <1200000000>;
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opp-microvolt = <1187500>;
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clock-latency-ns = <200000>;
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};
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opp@1300000000 {
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opp-hz = /bits/ 64 <1300000000>;
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opp-microvolt = <1250000>;
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clock-latency-ns = <200000>;
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};
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opp@1400000000 {
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opp-hz = /bits/ 64 <1400000000>;
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opp-microvolt = <1287500>;
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clock-latency-ns = <200000>;
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};
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opp@1500000000 {
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opp-hz = /bits/ 64 <1500000000>;
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opp-microvolt = <1350000>;
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clock-latency-ns = <200000>;
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turbo-mode;
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};
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};
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pmu {
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interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
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};
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};
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&pmu_system_controller {
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compatible = "samsung,exynos4412-pmu", "syscon";
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};
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&combiner {
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samsung,combiner-nr = <20>;
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};
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&gic {
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cpu-offset = <0x4000>;
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};
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