210 lines
4.2 KiB
C
210 lines
4.2 KiB
C
/*
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* linux/arch/arm/mach-mmp/gplugd.c
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*
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* Support for the Marvell PXA168-based GuruPlug Display (gplugD) Platform.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/gpio-pxa.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <mach/irqs.h>
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#include <mach/pxa168.h>
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#include <mach/mfp-pxa168.h>
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#include "common.h"
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static unsigned long gplugd_pin_config[] __initdata = {
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/* UART3 */
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GPIO8_UART3_TXD,
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GPIO9_UART3_RXD,
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GPIO1O_UART3_CTS,
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GPIO11_UART3_RTS,
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/* USB OTG PEN */
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GPIO18_GPIO,
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/* MMC2 */
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GPIO28_MMC2_CMD,
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GPIO29_MMC2_CLK,
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GPIO30_MMC2_DAT0,
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GPIO31_MMC2_DAT1,
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GPIO32_MMC2_DAT2,
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GPIO33_MMC2_DAT3,
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/* LCD & HDMI clock selection GPIO: 0: 74.176MHz, 1: 74.25 MHz */
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GPIO35_GPIO,
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GPIO36_GPIO, /* CEC Interrupt */
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/* MMC1 */
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GPIO43_MMC1_CLK,
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GPIO49_MMC1_CMD,
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GPIO41_MMC1_DAT0,
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GPIO40_MMC1_DAT1,
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GPIO52_MMC1_DAT2,
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GPIO51_MMC1_DAT3,
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GPIO53_MMC1_CD,
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/* LCD */
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GPIO56_LCD_FCLK_RD,
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GPIO57_LCD_LCLK_A0,
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GPIO58_LCD_PCLK_WR,
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GPIO59_LCD_DENA_BIAS,
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GPIO60_LCD_DD0,
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GPIO61_LCD_DD1,
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GPIO62_LCD_DD2,
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GPIO63_LCD_DD3,
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GPIO64_LCD_DD4,
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GPIO65_LCD_DD5,
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GPIO66_LCD_DD6,
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GPIO67_LCD_DD7,
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GPIO68_LCD_DD8,
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GPIO69_LCD_DD9,
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GPIO70_LCD_DD10,
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GPIO71_LCD_DD11,
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GPIO72_LCD_DD12,
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GPIO73_LCD_DD13,
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GPIO74_LCD_DD14,
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GPIO75_LCD_DD15,
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GPIO76_LCD_DD16,
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GPIO77_LCD_DD17,
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GPIO78_LCD_DD18,
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GPIO79_LCD_DD19,
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GPIO80_LCD_DD20,
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GPIO81_LCD_DD21,
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GPIO82_LCD_DD22,
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GPIO83_LCD_DD23,
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/* GPIO */
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GPIO84_GPIO,
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GPIO85_GPIO,
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/* Fast-Ethernet*/
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GPIO86_TX_CLK,
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GPIO87_TX_EN,
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GPIO88_TX_DQ3,
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GPIO89_TX_DQ2,
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GPIO90_TX_DQ1,
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GPIO91_TX_DQ0,
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GPIO92_MII_CRS,
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GPIO93_MII_COL,
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GPIO94_RX_CLK,
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GPIO95_RX_ER,
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GPIO96_RX_DQ3,
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GPIO97_RX_DQ2,
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GPIO98_RX_DQ1,
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GPIO99_RX_DQ0,
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GPIO100_MII_MDC,
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GPIO101_MII_MDIO,
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GPIO103_RX_DV,
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GPIO104_GPIO, /* Reset PHY */
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/* RTC interrupt */
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GPIO102_GPIO,
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/* I2C */
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GPIO105_CI2C_SDA,
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GPIO106_CI2C_SCL,
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/* SPI NOR Flash on SSP2 */
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GPIO107_SSP2_RXD,
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GPIO108_SSP2_TXD,
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GPIO110_GPIO, /* SPI_CSn */
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GPIO111_SSP2_CLK,
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/* Select JTAG */
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GPIO109_GPIO,
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/* I2S */
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GPIO114_I2S_FRM,
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GPIO115_I2S_BCLK,
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GPIO116_I2S_TXD
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};
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static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
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.irq_base = MMP_GPIO_TO_IRQ(0),
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};
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static struct i2c_board_info gplugd_i2c_board_info[] = {
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{
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.type = "isl1208",
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.addr = 0x6F,
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}
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};
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/* Bring PHY out of reset by setting GPIO 104 */
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static int gplugd_eth_init(void)
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{
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if (unlikely(gpio_request(104, "ETH_RESET_N"))) {
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printk(KERN_ERR "Can't get hold of GPIO 104 to bring Ethernet "
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"PHY out of reset\n");
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return -EIO;
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}
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gpio_direction_output(104, 1);
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gpio_free(104);
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return 0;
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}
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struct pxa168_eth_platform_data gplugd_eth_platform_data = {
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.port_number = 0,
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.phy_addr = 0,
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.speed = 0, /* Autonagotiation */
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.intf = PHY_INTERFACE_MODE_RMII,
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.init = gplugd_eth_init,
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};
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static void __init select_disp_freq(void)
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{
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/* set GPIO 35 & clear GPIO 85 to set LCD External Clock to 74.25 MHz */
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if (unlikely(gpio_request(35, "DISP_FREQ_SEL"))) {
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printk(KERN_ERR "Can't get hold of GPIO 35 to select display "
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"frequency\n");
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} else {
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gpio_direction_output(35, 1);
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gpio_free(35);
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}
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if (unlikely(gpio_request(85, "DISP_FREQ_SEL_2"))) {
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printk(KERN_ERR "Can't get hold of GPIO 85 to select display "
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"frequency\n");
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} else {
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gpio_direction_output(85, 0);
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gpio_free(85);
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}
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}
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static void __init gplugd_init(void)
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{
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mfp_config(ARRAY_AND_SIZE(gplugd_pin_config));
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select_disp_freq();
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/* on-chip devices */
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pxa168_add_uart(3);
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pxa168_add_ssp(1);
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pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
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platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
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sizeof(struct pxa_gpio_platform_data));
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platform_device_register(&pxa168_device_gpio);
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pxa168_add_eth(&gplugd_eth_platform_data);
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}
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MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
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.map_io = mmp_map_io,
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.nr_irqs = MMP_NR_IRQS,
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.init_irq = pxa168_init_irq,
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.init_time = pxa168_timer_init,
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.init_machine = gplugd_init,
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.restart = pxa168_restart,
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MACHINE_END
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