537 lines
12 KiB
C
537 lines
12 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright SUSE Linux Products GmbH 2009
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*
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* Authors: Alexander Graf <agraf@suse.de>
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*/
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/highmem.h>
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#include <asm/tlbflush.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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/* #define DEBUG_MMU */
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#ifdef DEBUG_MMU
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#define dprintk(X...) printk(KERN_INFO X)
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#else
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#define dprintk(X...) do { } while(0)
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#endif
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static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
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{
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kvmppc_set_msr(vcpu, MSR_SF);
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}
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static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
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struct kvm_vcpu *vcpu,
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gva_t eaddr)
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{
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int i;
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u64 esid = GET_ESID(eaddr);
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u64 esid_1t = GET_ESID_1T(eaddr);
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for (i = 0; i < vcpu->arch.slb_nr; i++) {
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u64 cmp_esid = esid;
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if (!vcpu->arch.slb[i].valid)
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continue;
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if (vcpu->arch.slb[i].tb)
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cmp_esid = esid_1t;
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if (vcpu->arch.slb[i].esid == cmp_esid)
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return &vcpu->arch.slb[i];
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}
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dprintk("KVM: No SLB entry found for 0x%lx [%llx | %llx]\n",
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eaddr, esid, esid_1t);
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for (i = 0; i < vcpu->arch.slb_nr; i++) {
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if (vcpu->arch.slb[i].vsid)
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dprintk(" %d: %c%c%c %llx %llx\n", i,
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vcpu->arch.slb[i].valid ? 'v' : ' ',
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vcpu->arch.slb[i].large ? 'l' : ' ',
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vcpu->arch.slb[i].tb ? 't' : ' ',
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vcpu->arch.slb[i].esid,
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vcpu->arch.slb[i].vsid);
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}
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return NULL;
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}
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static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
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bool data)
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{
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struct kvmppc_slb *slb;
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slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
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if (!slb)
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return 0;
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if (slb->tb)
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return (((u64)eaddr >> 12) & 0xfffffff) |
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(((u64)slb->vsid) << 28);
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return (((u64)eaddr >> 12) & 0xffff) | (((u64)slb->vsid) << 16);
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}
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static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
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{
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return slbe->large ? 24 : 12;
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}
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static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
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{
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int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
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return ((eaddr & 0xfffffff) >> p);
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}
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static hva_t kvmppc_mmu_book3s_64_get_pteg(
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struct kvmppc_vcpu_book3s *vcpu_book3s,
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struct kvmppc_slb *slbe, gva_t eaddr,
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bool second)
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{
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u64 hash, pteg, htabsize;
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u32 page;
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hva_t r;
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page = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
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htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);
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hash = slbe->vsid ^ page;
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if (second)
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hash = ~hash;
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hash &= ((1ULL << 39ULL) - 1ULL);
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hash &= htabsize;
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hash <<= 7ULL;
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pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
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pteg |= hash;
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dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
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page, vcpu_book3s->sdr1, pteg, slbe->vsid);
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/* When running a PAPR guest, SDR1 contains a HVA address instead
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of a GPA */
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if (vcpu_book3s->vcpu.arch.papr_enabled)
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r = pteg;
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else
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r = gfn_to_hva(vcpu_book3s->vcpu.kvm, pteg >> PAGE_SHIFT);
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if (kvm_is_error_hva(r))
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return r;
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return r | (pteg & ~PAGE_MASK);
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}
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static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
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{
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int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
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u64 avpn;
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avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
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avpn |= slbe->vsid << (28 - p);
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if (p < 24)
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avpn >>= ((80 - p) - 56) - 8;
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else
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avpn <<= 8;
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return avpn;
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}
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static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
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struct kvmppc_pte *gpte, bool data)
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{
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struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
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struct kvmppc_slb *slbe;
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hva_t ptegp;
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u64 pteg[16];
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u64 avpn = 0;
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int i;
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u8 key = 0;
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bool found = false;
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bool perm_err = false;
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int second = 0;
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ulong mp_ea = vcpu->arch.magic_page_ea;
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/* Magic page override */
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if (unlikely(mp_ea) &&
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unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
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!(vcpu->arch.shared->msr & MSR_PR)) {
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gpte->eaddr = eaddr;
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gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
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gpte->raddr = vcpu->arch.magic_page_pa | (gpte->raddr & 0xfff);
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gpte->raddr &= KVM_PAM;
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gpte->may_execute = true;
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gpte->may_read = true;
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gpte->may_write = true;
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return 0;
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}
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slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
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if (!slbe)
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goto no_seg_found;
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do_second:
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ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu_book3s, slbe, eaddr, second);
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if (kvm_is_error_hva(ptegp))
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goto no_page_found;
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avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);
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if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
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printk(KERN_ERR "KVM can't copy data from 0x%lx!\n", ptegp);
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goto no_page_found;
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}
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if ((vcpu->arch.shared->msr & MSR_PR) && slbe->Kp)
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key = 4;
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else if (!(vcpu->arch.shared->msr & MSR_PR) && slbe->Ks)
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key = 4;
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for (i=0; i<16; i+=2) {
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u64 v = pteg[i];
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u64 r = pteg[i+1];
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/* Valid check */
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if (!(v & HPTE_V_VALID))
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continue;
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/* Hash check */
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if ((v & HPTE_V_SECONDARY) != second)
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continue;
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/* AVPN compare */
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if (HPTE_V_AVPN_VAL(avpn) == HPTE_V_AVPN_VAL(v)) {
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u8 pp = (r & HPTE_R_PP) | key;
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int eaddr_mask = 0xFFF;
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gpte->eaddr = eaddr;
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gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu,
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eaddr,
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data);
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if (slbe->large)
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eaddr_mask = 0xFFFFFF;
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gpte->raddr = (r & HPTE_R_RPN) | (eaddr & eaddr_mask);
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gpte->may_execute = ((r & HPTE_R_N) ? false : true);
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gpte->may_read = false;
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gpte->may_write = false;
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switch (pp) {
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case 0:
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case 1:
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case 2:
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case 6:
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gpte->may_write = true;
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/* fall through */
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case 3:
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case 5:
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case 7:
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gpte->may_read = true;
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break;
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}
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if (!gpte->may_read) {
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perm_err = true;
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continue;
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}
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dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
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"-> 0x%lx\n",
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eaddr, avpn, gpte->vpage, gpte->raddr);
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found = true;
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break;
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}
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}
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/* Update PTE R and C bits, so the guest's swapper knows we used the
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* page */
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if (found) {
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u32 oldr = pteg[i+1];
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if (gpte->may_read) {
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/* Set the accessed flag */
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pteg[i+1] |= HPTE_R_R;
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}
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if (gpte->may_write) {
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/* Set the dirty flag */
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pteg[i+1] |= HPTE_R_C;
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} else {
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dprintk("KVM: Mapping read-only page!\n");
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}
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/* Write back into the PTEG */
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if (pteg[i+1] != oldr)
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copy_to_user((void __user *)ptegp, pteg, sizeof(pteg));
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return 0;
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} else {
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dprintk("KVM MMU: No PTE found (ea=0x%lx sdr1=0x%llx "
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"ptegp=0x%lx)\n",
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eaddr, to_book3s(vcpu)->sdr1, ptegp);
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for (i = 0; i < 16; i += 2)
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dprintk(" %02d: 0x%llx - 0x%llx (0x%llx)\n",
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i, pteg[i], pteg[i+1], avpn);
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if (!second) {
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second = HPTE_V_SECONDARY;
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goto do_second;
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}
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}
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no_page_found:
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if (perm_err)
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return -EPERM;
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return -ENOENT;
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no_seg_found:
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dprintk("KVM MMU: Trigger segment fault\n");
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return -EINVAL;
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}
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static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
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{
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struct kvmppc_vcpu_book3s *vcpu_book3s;
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u64 esid, esid_1t;
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int slb_nr;
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struct kvmppc_slb *slbe;
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dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);
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vcpu_book3s = to_book3s(vcpu);
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esid = GET_ESID(rb);
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esid_1t = GET_ESID_1T(rb);
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slb_nr = rb & 0xfff;
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if (slb_nr > vcpu->arch.slb_nr)
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return;
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slbe = &vcpu->arch.slb[slb_nr];
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slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
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slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0;
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slbe->esid = slbe->tb ? esid_1t : esid;
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slbe->vsid = rs >> 12;
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slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
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slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0;
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slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0;
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slbe->nx = (rs & SLB_VSID_N) ? 1 : 0;
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slbe->class = (rs & SLB_VSID_C) ? 1 : 0;
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slbe->orige = rb & (ESID_MASK | SLB_ESID_V);
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slbe->origv = rs;
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/* Map the new segment */
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kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
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}
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static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
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{
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struct kvmppc_slb *slbe;
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if (slb_nr > vcpu->arch.slb_nr)
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return 0;
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slbe = &vcpu->arch.slb[slb_nr];
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return slbe->orige;
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}
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static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
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{
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struct kvmppc_slb *slbe;
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if (slb_nr > vcpu->arch.slb_nr)
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return 0;
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slbe = &vcpu->arch.slb[slb_nr];
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return slbe->origv;
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}
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static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
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{
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struct kvmppc_slb *slbe;
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dprintk("KVM MMU: slbie(0x%llx)\n", ea);
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slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
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if (!slbe)
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return;
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dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);
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slbe->valid = false;
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kvmppc_mmu_map_segment(vcpu, ea);
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}
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static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
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{
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int i;
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dprintk("KVM MMU: slbia()\n");
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for (i = 1; i < vcpu->arch.slb_nr; i++)
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vcpu->arch.slb[i].valid = false;
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if (vcpu->arch.shared->msr & MSR_IR) {
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kvmppc_mmu_flush_segments(vcpu);
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kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
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}
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}
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static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
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ulong value)
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{
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u64 rb = 0, rs = 0;
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/*
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* According to Book3 2.01 mtsrin is implemented as:
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*
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* The SLB entry specified by (RB)32:35 is loaded from register
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* RS, as follows.
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*
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* SLBE Bit Source SLB Field
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*
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* 0:31 0x0000_0000 ESID-0:31
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* 32:35 (RB)32:35 ESID-32:35
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* 36 0b1 V
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* 37:61 0x00_0000|| 0b0 VSID-0:24
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* 62:88 (RS)37:63 VSID-25:51
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* 89:91 (RS)33:35 Ks Kp N
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* 92 (RS)36 L ((RS)36 must be 0b0)
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* 93 0b0 C
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*/
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dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);
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/* ESID = srnum */
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rb |= (srnum & 0xf) << 28;
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/* Set the valid bit */
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rb |= 1 << 27;
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/* Index = ESID */
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rb |= srnum;
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/* VSID = VSID */
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rs |= (value & 0xfffffff) << 12;
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/* flags = flags */
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rs |= ((value >> 28) & 0x7) << 9;
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kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
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}
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static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
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bool large)
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{
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u64 mask = 0xFFFFFFFFFULL;
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dprintk("KVM MMU: tlbie(0x%lx)\n", va);
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if (large)
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mask = 0xFFFFFF000ULL;
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kvmppc_mmu_pte_vflush(vcpu, va >> 12, mask);
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}
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static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
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u64 *vsid)
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{
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ulong ea = esid << SID_SHIFT;
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struct kvmppc_slb *slb;
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u64 gvsid = esid;
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ulong mp_ea = vcpu->arch.magic_page_ea;
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if (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
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slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
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if (slb)
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gvsid = slb->vsid;
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}
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switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
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case 0:
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*vsid = VSID_REAL | esid;
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break;
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case MSR_IR:
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*vsid = VSID_REAL_IR | gvsid;
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break;
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case MSR_DR:
|
|
*vsid = VSID_REAL_DR | gvsid;
|
|
break;
|
|
case MSR_DR|MSR_IR:
|
|
if (!slb)
|
|
goto no_slb;
|
|
|
|
*vsid = gvsid;
|
|
break;
|
|
default:
|
|
BUG();
|
|
break;
|
|
}
|
|
|
|
if (vcpu->arch.shared->msr & MSR_PR)
|
|
*vsid |= VSID_PR;
|
|
|
|
return 0;
|
|
|
|
no_slb:
|
|
/* Catch magic page case */
|
|
if (unlikely(mp_ea) &&
|
|
unlikely(esid == (mp_ea >> SID_SHIFT)) &&
|
|
!(vcpu->arch.shared->msr & MSR_PR)) {
|
|
*vsid = VSID_REAL | esid;
|
|
return 0;
|
|
}
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
|
|
{
|
|
return (to_book3s(vcpu)->hid[5] & 0x80);
|
|
}
|
|
|
|
void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
|
|
|
|
mmu->mfsrin = NULL;
|
|
mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
|
|
mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
|
|
mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
|
|
mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
|
|
mmu->slbie = kvmppc_mmu_book3s_64_slbie;
|
|
mmu->slbia = kvmppc_mmu_book3s_64_slbia;
|
|
mmu->xlate = kvmppc_mmu_book3s_64_xlate;
|
|
mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
|
|
mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
|
|
mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
|
|
mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
|
|
mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;
|
|
|
|
vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;
|
|
}
|