154 lines
3.9 KiB
C
154 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/memblock.h>
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#include <linux/mem_encrypt.h>
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#include <asm/set_memory.h>
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#include <asm/pgtable.h>
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#include <asm/realmode.h>
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#include <asm/tlbflush.h>
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struct real_mode_header *real_mode_header;
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u32 *trampoline_cr4_features;
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/* Hold the pgd entry used on booting additional CPUs */
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pgd_t trampoline_pgd_entry;
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void __init reserve_real_mode(void)
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{
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phys_addr_t mem;
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size_t size = real_mode_size_needed();
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if (!size)
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return;
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WARN_ON(slab_is_available());
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/* Has to be under 1M so we can execute real-mode AP code. */
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mem = memblock_find_in_range(0, 1<<20, size, PAGE_SIZE);
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if (!mem) {
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pr_info("No sub-1M memory is available for the trampoline\n");
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return;
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}
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memblock_reserve(mem, size);
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set_real_mode_mem(mem);
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}
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static void __init setup_real_mode(void)
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{
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u16 real_mode_seg;
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const u32 *rel;
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u32 count;
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unsigned char *base;
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unsigned long phys_base;
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struct trampoline_header *trampoline_header;
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size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
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#ifdef CONFIG_X86_64
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u64 *trampoline_pgd;
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u64 efer;
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#endif
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base = (unsigned char *)real_mode_header;
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/*
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* If SME is active, the trampoline area will need to be in
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* decrypted memory in order to bring up other processors
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* successfully. This is not needed for SEV.
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*/
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if (sme_active())
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set_memory_decrypted((unsigned long)base, size >> PAGE_SHIFT);
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memcpy(base, real_mode_blob, size);
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phys_base = __pa(base);
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real_mode_seg = phys_base >> 4;
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rel = (u32 *) real_mode_relocs;
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/* 16-bit segment relocations. */
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count = *rel++;
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while (count--) {
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u16 *seg = (u16 *) (base + *rel++);
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*seg = real_mode_seg;
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}
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/* 32-bit linear relocations. */
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count = *rel++;
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while (count--) {
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u32 *ptr = (u32 *) (base + *rel++);
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*ptr += phys_base;
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}
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/* Must be perfomed *after* relocation. */
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trampoline_header = (struct trampoline_header *)
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__va(real_mode_header->trampoline_header);
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#ifdef CONFIG_X86_32
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trampoline_header->start = __pa_symbol(startup_32_smp);
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trampoline_header->gdt_limit = __BOOT_DS + 7;
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trampoline_header->gdt_base = __pa_symbol(boot_gdt);
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#else
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/*
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* Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR
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* so we need to mask it out.
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*/
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rdmsrl(MSR_EFER, efer);
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trampoline_header->efer = efer & ~EFER_LMA;
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trampoline_header->start = (u64) secondary_startup_64;
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trampoline_cr4_features = &trampoline_header->cr4;
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*trampoline_cr4_features = mmu_cr4_features;
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trampoline_header->flags = 0;
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if (sme_active())
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trampoline_header->flags |= TH_FLAGS_SME_ACTIVE;
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trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd);
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trampoline_pgd[0] = trampoline_pgd_entry.pgd;
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trampoline_pgd[511] = init_top_pgt[511].pgd;
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#endif
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}
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/*
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* reserve_real_mode() gets called very early, to guarantee the
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* availability of low memory. This is before the proper kernel page
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* tables are set up, so we cannot set page permissions in that
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* function. Also trampoline code will be executed by APs so we
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* need to mark it executable at do_pre_smp_initcalls() at least,
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* thus run it as a early_initcall().
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*/
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static void __init set_real_mode_permissions(void)
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{
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unsigned char *base = (unsigned char *) real_mode_header;
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size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
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size_t ro_size =
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PAGE_ALIGN(real_mode_header->ro_end) -
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__pa(base);
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size_t text_size =
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PAGE_ALIGN(real_mode_header->ro_end) -
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real_mode_header->text_start;
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unsigned long text_start =
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(unsigned long) __va(real_mode_header->text_start);
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set_memory_nx((unsigned long) base, size >> PAGE_SHIFT);
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set_memory_ro((unsigned long) base, ro_size >> PAGE_SHIFT);
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set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT);
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}
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static int __init init_real_mode(void)
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{
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if (!real_mode_header)
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panic("Real mode trampoline was not allocated");
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setup_real_mode();
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set_real_mode_permissions();
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return 0;
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}
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early_initcall(init_real_mode);
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