71 lines
1.5 KiB
Plaintext
71 lines
1.5 KiB
Plaintext
/* The pxa3xx skeleton simply augments the 2xx version */
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#include "pxa2xx.dtsi"
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/ {
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model = "Marvell PXA3xx familiy SoC";
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compatible = "marvell,pxa3xx";
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pxabus {
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pwri2c: i2c@40f500c0 {
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compatible = "mrvl,pwri2c";
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reg = <0x40f500c0 0x30>;
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interrupts = <6>;
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clocks = <&clks CLK_PWRI2C>;
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#address-cells = <0x1>;
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#size-cells = <0>;
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status = "disabled";
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};
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nand0: nand@43100000 {
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compatible = "marvell,pxa3xx-nand";
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reg = <0x43100000 90>;
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interrupts = <45>;
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clocks = <&clks CLK_NAND>;
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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};
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pxairq: interrupt-controller@40d00000 {
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marvell,intc-priority;
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marvell,intc-nr-irqs = <56>;
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};
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gpio: gpio@40e00000 {
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compatible = "intel,pxa3xx-gpio";
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reg = <0x40e00000 0x10000>;
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clocks = <&clks CLK_GPIO>;
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interrupt-names = "gpio0", "gpio1", "gpio_mux";
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interrupts = <8 9 10>;
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gpio-controller;
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#gpio-cells = <0x2>;
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interrupt-controller;
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#interrupt-cells = <0x2>;
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};
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};
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clocks {
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/*
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* The muxing of external clocks/internal dividers for osc* clock
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* sources has been hidden under the carpet by now.
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*/
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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clks: pxa3xx_clks@41300004 {
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compatible = "marvell,pxa300-clocks";
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#clock-cells = <1>;
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status = "okay";
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};
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};
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timer@40a00000 {
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compatible = "marvell,pxa-timer";
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reg = <0x40a00000 0x20>;
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interrupts = <26>;
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clocks = <&clks CLK_OSTIMER>;
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status = "okay";
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};
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};
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