724 lines
20 KiB
C
724 lines
20 KiB
C
/*
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* linux/drivers/video/offb.c -- Open Firmware based frame buffer device
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*
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* Copyright (C) 1997 Geert Uytterhoeven
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*
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* This driver is partly based on the PowerMac console driver:
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*
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* Copyright (C) 1996 Paul Mackerras
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*/
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#include <linux/aperture.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/vmalloc.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/interrupt.h>
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#include <linux/fb.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <asm/io.h>
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#ifdef CONFIG_PPC32
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#include <asm/bootx.h>
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#endif
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#include "macmodes.h"
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/* Supported palette hacks */
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enum {
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cmap_unknown,
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cmap_simple, /* ATI Mach64 */
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cmap_r128, /* ATI Rage128 */
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cmap_M3A, /* ATI Rage Mobility M3 Head A */
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cmap_M3B, /* ATI Rage Mobility M3 Head B */
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cmap_radeon, /* ATI Radeon */
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cmap_gxt2000, /* IBM GXT2000 */
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cmap_avivo, /* ATI R5xx */
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cmap_qemu, /* qemu vga */
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};
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struct offb_par {
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volatile void __iomem *cmap_adr;
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volatile void __iomem *cmap_data;
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int cmap_type;
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int blanked;
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u32 pseudo_palette[16];
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resource_size_t base;
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resource_size_t size;
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};
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#ifdef CONFIG_PPC32
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extern boot_infos_t *boot_infos;
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#endif
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/* Definitions used by the Avivo palette hack */
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#define AVIVO_DC_LUT_RW_SELECT 0x6480
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#define AVIVO_DC_LUT_RW_MODE 0x6484
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#define AVIVO_DC_LUT_RW_INDEX 0x6488
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#define AVIVO_DC_LUT_SEQ_COLOR 0x648c
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#define AVIVO_DC_LUT_PWL_DATA 0x6490
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#define AVIVO_DC_LUT_30_COLOR 0x6494
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#define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498
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#define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c
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#define AVIVO_DC_LUT_AUTOFILL 0x64a0
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#define AVIVO_DC_LUTA_CONTROL 0x64c0
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#define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4
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#define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8
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#define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc
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#define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0
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#define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4
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#define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8
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#define AVIVO_DC_LUTB_CONTROL 0x6cc0
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#define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4
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#define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8
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#define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc
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#define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0
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#define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4
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#define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8
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/*
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* Set a single color register. The values supplied are already
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* rounded down to the hardware's capabilities (according to the
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* entries in the var structure). Return != 0 for invalid regno.
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*/
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static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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u_int transp, struct fb_info *info)
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{
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struct offb_par *par = (struct offb_par *) info->par;
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if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
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u32 *pal = info->pseudo_palette;
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u32 cr = red >> (16 - info->var.red.length);
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u32 cg = green >> (16 - info->var.green.length);
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u32 cb = blue >> (16 - info->var.blue.length);
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u32 value;
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if (regno >= 16)
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return -EINVAL;
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value = (cr << info->var.red.offset) |
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(cg << info->var.green.offset) |
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(cb << info->var.blue.offset);
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if (info->var.transp.length > 0) {
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u32 mask = (1 << info->var.transp.length) - 1;
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mask <<= info->var.transp.offset;
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value |= mask;
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}
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pal[regno] = value;
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return 0;
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}
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if (regno > 255)
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return -EINVAL;
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red >>= 8;
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green >>= 8;
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blue >>= 8;
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if (!par->cmap_adr)
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return 0;
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switch (par->cmap_type) {
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case cmap_simple:
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writeb(regno, par->cmap_adr);
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writeb(red, par->cmap_data);
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writeb(green, par->cmap_data);
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writeb(blue, par->cmap_data);
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break;
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case cmap_M3A:
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/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
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out_le32(par->cmap_adr + 0x58,
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in_le32(par->cmap_adr + 0x58) & ~0x20);
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fallthrough;
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case cmap_r128:
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/* Set palette index & data */
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out_8(par->cmap_adr + 0xb0, regno);
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out_le32(par->cmap_adr + 0xb4,
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(red << 16 | green << 8 | blue));
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break;
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case cmap_M3B:
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/* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
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out_le32(par->cmap_adr + 0x58,
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in_le32(par->cmap_adr + 0x58) | 0x20);
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/* Set palette index & data */
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out_8(par->cmap_adr + 0xb0, regno);
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out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
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break;
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case cmap_radeon:
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/* Set palette index & data (could be smarter) */
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out_8(par->cmap_adr + 0xb0, regno);
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out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
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break;
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case cmap_gxt2000:
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out_le32(((unsigned __iomem *) par->cmap_adr) + regno,
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(red << 16 | green << 8 | blue));
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break;
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case cmap_avivo:
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/* Write to both LUTs for now */
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writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
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writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
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writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
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par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
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writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
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writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
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writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
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par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
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break;
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}
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return 0;
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}
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/*
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* Blank the display.
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*/
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static int offb_blank(int blank, struct fb_info *info)
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{
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struct offb_par *par = (struct offb_par *) info->par;
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int i, j;
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if (!par->cmap_adr)
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return 0;
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if (!par->blanked)
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if (!blank)
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return 0;
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par->blanked = blank;
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if (blank)
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for (i = 0; i < 256; i++) {
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switch (par->cmap_type) {
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case cmap_simple:
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writeb(i, par->cmap_adr);
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for (j = 0; j < 3; j++)
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writeb(0, par->cmap_data);
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break;
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case cmap_M3A:
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/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
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out_le32(par->cmap_adr + 0x58,
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in_le32(par->cmap_adr + 0x58) & ~0x20);
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fallthrough;
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case cmap_r128:
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/* Set palette index & data */
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out_8(par->cmap_adr + 0xb0, i);
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out_le32(par->cmap_adr + 0xb4, 0);
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break;
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case cmap_M3B:
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/* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
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out_le32(par->cmap_adr + 0x58,
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in_le32(par->cmap_adr + 0x58) | 0x20);
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/* Set palette index & data */
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out_8(par->cmap_adr + 0xb0, i);
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out_le32(par->cmap_adr + 0xb4, 0);
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break;
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case cmap_radeon:
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out_8(par->cmap_adr + 0xb0, i);
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out_le32(par->cmap_adr + 0xb4, 0);
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break;
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case cmap_gxt2000:
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out_le32(((unsigned __iomem *) par->cmap_adr) + i,
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0);
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break;
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case cmap_avivo:
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writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
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writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
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writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
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writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
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writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
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writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
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break;
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}
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} else
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fb_set_cmap(&info->cmap, info);
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return 0;
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}
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static int offb_set_par(struct fb_info *info)
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{
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struct offb_par *par = (struct offb_par *) info->par;
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/* On avivo, initialize palette control */
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if (par->cmap_type == cmap_avivo) {
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writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL);
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writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE);
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writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN);
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writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED);
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writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE);
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writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN);
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writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED);
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writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL);
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writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE);
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writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN);
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writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED);
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writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE);
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writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN);
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writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED);
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writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
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writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
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writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
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writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
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writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
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writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
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}
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return 0;
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}
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static void offb_destroy(struct fb_info *info)
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{
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struct offb_par *par = info->par;
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if (info->screen_base)
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iounmap(info->screen_base);
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release_mem_region(par->base, par->size);
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fb_dealloc_cmap(&info->cmap);
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framebuffer_release(info);
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}
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static const struct fb_ops offb_ops = {
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.owner = THIS_MODULE,
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FB_DEFAULT_IOMEM_OPS,
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.fb_destroy = offb_destroy,
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.fb_setcolreg = offb_setcolreg,
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.fb_set_par = offb_set_par,
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.fb_blank = offb_blank,
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};
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static void __iomem *offb_map_reg(struct device_node *np, int index,
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unsigned long offset, unsigned long size)
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{
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const __be32 *addrp;
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u64 asize, taddr;
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unsigned int flags;
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addrp = of_get_pci_address(np, index, &asize, &flags);
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if (addrp == NULL)
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addrp = of_get_address(np, index, &asize, &flags);
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if (addrp == NULL)
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return NULL;
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if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
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return NULL;
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if ((offset + size) > asize)
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return NULL;
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taddr = of_translate_address(np, addrp);
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if (taddr == OF_BAD_ADDR)
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return NULL;
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return ioremap(taddr + offset, size);
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}
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static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp,
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unsigned long address)
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{
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struct offb_par *par = (struct offb_par *) info->par;
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if (of_node_name_prefix(dp, "ATY,Rage128")) {
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par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
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if (par->cmap_adr)
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par->cmap_type = cmap_r128;
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} else if (of_node_name_prefix(dp, "ATY,RageM3pA") ||
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of_node_name_prefix(dp, "ATY,RageM3p12A")) {
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par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
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if (par->cmap_adr)
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par->cmap_type = cmap_M3A;
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} else if (of_node_name_prefix(dp, "ATY,RageM3pB")) {
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par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
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if (par->cmap_adr)
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par->cmap_type = cmap_M3B;
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} else if (of_node_name_prefix(dp, "ATY,Rage6")) {
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par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff);
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if (par->cmap_adr)
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par->cmap_type = cmap_radeon;
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} else if (of_node_name_prefix(dp, "ATY,")) {
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unsigned long base = address & 0xff000000UL;
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par->cmap_adr =
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ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
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par->cmap_data = par->cmap_adr + 1;
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par->cmap_type = cmap_simple;
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} else if (dp && (of_device_is_compatible(dp, "pci1014,b7") ||
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of_device_is_compatible(dp, "pci1014,21c"))) {
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par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000);
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if (par->cmap_adr)
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par->cmap_type = cmap_gxt2000;
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} else if (of_node_name_prefix(dp, "vga,Display-")) {
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/* Look for AVIVO initialized by SLOF */
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struct device_node *pciparent = of_get_parent(dp);
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const u32 *vid, *did;
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vid = of_get_property(pciparent, "vendor-id", NULL);
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did = of_get_property(pciparent, "device-id", NULL);
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/* This will match most R5xx */
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if (vid && did && *vid == 0x1002 &&
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((*did >= 0x7100 && *did < 0x7800) ||
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(*did >= 0x9400))) {
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par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000);
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if (par->cmap_adr)
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par->cmap_type = cmap_avivo;
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}
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of_node_put(pciparent);
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} else if (dp && of_device_is_compatible(dp, "qemu,std-vga")) {
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#ifdef __BIG_ENDIAN
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const __be32 io_of_addr[3] = { 0x01000000, 0x0, 0x0 };
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#else
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const __be32 io_of_addr[3] = { 0x00000001, 0x0, 0x0 };
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#endif
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u64 io_addr = of_translate_address(dp, io_of_addr);
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if (io_addr != OF_BAD_ADDR) {
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par->cmap_adr = ioremap(io_addr + 0x3c8, 2);
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if (par->cmap_adr) {
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par->cmap_type = cmap_simple;
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par->cmap_data = par->cmap_adr + 1;
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}
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}
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}
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info->fix.visual = (par->cmap_type != cmap_unknown) ?
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FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR;
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}
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|
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static void offb_init_fb(struct platform_device *parent, const char *name,
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int width, int height, int depth,
|
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int pitch, unsigned long address,
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int foreign_endian, struct device_node *dp)
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{
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unsigned long res_size = pitch * height;
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unsigned long res_start = address;
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struct fb_fix_screeninfo *fix;
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struct fb_var_screeninfo *var;
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struct fb_info *info;
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struct offb_par *par;
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if (!request_mem_region(res_start, res_size, "offb"))
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return;
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|
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printk(KERN_INFO
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"Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
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width, height, name, address, depth, pitch);
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if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
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printk(KERN_ERR "%pOF: can't use depth = %d\n", dp, depth);
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release_mem_region(res_start, res_size);
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return;
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}
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|
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info = framebuffer_alloc(sizeof(*par), &parent->dev);
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if (!info) {
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release_mem_region(res_start, res_size);
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return;
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}
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platform_set_drvdata(parent, info);
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par = info->par;
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fix = &info->fix;
|
|
var = &info->var;
|
|
|
|
if (name) {
|
|
strcpy(fix->id, "OFfb ");
|
|
strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
|
|
fix->id[sizeof(fix->id) - 1] = '\0';
|
|
} else
|
|
snprintf(fix->id, sizeof(fix->id), "OFfb %pOFn", dp);
|
|
|
|
|
|
var->xres = var->xres_virtual = width;
|
|
var->yres = var->yres_virtual = height;
|
|
fix->line_length = pitch;
|
|
|
|
fix->smem_start = address;
|
|
fix->smem_len = pitch * height;
|
|
fix->type = FB_TYPE_PACKED_PIXELS;
|
|
fix->type_aux = 0;
|
|
|
|
par->cmap_type = cmap_unknown;
|
|
if (depth == 8)
|
|
offb_init_palette_hacks(info, dp, address);
|
|
else
|
|
fix->visual = FB_VISUAL_TRUECOLOR;
|
|
|
|
var->xoffset = var->yoffset = 0;
|
|
switch (depth) {
|
|
case 8:
|
|
var->bits_per_pixel = 8;
|
|
var->red.offset = 0;
|
|
var->red.length = 8;
|
|
var->green.offset = 0;
|
|
var->green.length = 8;
|
|
var->blue.offset = 0;
|
|
var->blue.length = 8;
|
|
var->transp.offset = 0;
|
|
var->transp.length = 0;
|
|
break;
|
|
case 15: /* RGB 555 */
|
|
var->bits_per_pixel = 16;
|
|
var->red.offset = 10;
|
|
var->red.length = 5;
|
|
var->green.offset = 5;
|
|
var->green.length = 5;
|
|
var->blue.offset = 0;
|
|
var->blue.length = 5;
|
|
var->transp.offset = 0;
|
|
var->transp.length = 0;
|
|
break;
|
|
case 16: /* RGB 565 */
|
|
var->bits_per_pixel = 16;
|
|
var->red.offset = 11;
|
|
var->red.length = 5;
|
|
var->green.offset = 5;
|
|
var->green.length = 6;
|
|
var->blue.offset = 0;
|
|
var->blue.length = 5;
|
|
var->transp.offset = 0;
|
|
var->transp.length = 0;
|
|
break;
|
|
case 32: /* RGB 888 */
|
|
var->bits_per_pixel = 32;
|
|
var->red.offset = 16;
|
|
var->red.length = 8;
|
|
var->green.offset = 8;
|
|
var->green.length = 8;
|
|
var->blue.offset = 0;
|
|
var->blue.length = 8;
|
|
var->transp.offset = 24;
|
|
var->transp.length = 8;
|
|
break;
|
|
}
|
|
var->red.msb_right = var->green.msb_right = var->blue.msb_right =
|
|
var->transp.msb_right = 0;
|
|
var->grayscale = 0;
|
|
var->nonstd = 0;
|
|
var->activate = 0;
|
|
var->height = var->width = -1;
|
|
var->pixclock = 10000;
|
|
var->left_margin = var->right_margin = 16;
|
|
var->upper_margin = var->lower_margin = 16;
|
|
var->hsync_len = var->vsync_len = 8;
|
|
var->sync = 0;
|
|
var->vmode = FB_VMODE_NONINTERLACED;
|
|
|
|
par->base = address;
|
|
par->size = fix->smem_len;
|
|
|
|
info->fbops = &offb_ops;
|
|
info->screen_base = ioremap(address, fix->smem_len);
|
|
info->pseudo_palette = par->pseudo_palette;
|
|
info->flags = foreign_endian;
|
|
|
|
fb_alloc_cmap(&info->cmap, 256, 0);
|
|
|
|
if (devm_aperture_acquire_for_platform_device(parent, par->base, par->size) < 0)
|
|
goto out_err;
|
|
if (register_framebuffer(info) < 0)
|
|
goto out_err;
|
|
|
|
fb_info(info, "Open Firmware frame buffer device on %pOF\n", dp);
|
|
return;
|
|
|
|
out_err:
|
|
fb_dealloc_cmap(&info->cmap);
|
|
iounmap(info->screen_base);
|
|
iounmap(par->cmap_adr);
|
|
par->cmap_adr = NULL;
|
|
framebuffer_release(info);
|
|
release_mem_region(res_start, res_size);
|
|
}
|
|
|
|
|
|
static void offb_init_nodriver(struct platform_device *parent, struct device_node *dp,
|
|
int no_real_node)
|
|
{
|
|
unsigned int len;
|
|
int i, width = 640, height = 480, depth = 8, pitch = 640;
|
|
unsigned int flags, rsize, addr_prop = 0;
|
|
unsigned long max_size = 0;
|
|
u64 rstart, address = OF_BAD_ADDR;
|
|
const __be32 *pp, *addrp, *up;
|
|
u64 asize;
|
|
int foreign_endian = 0;
|
|
|
|
#ifdef __BIG_ENDIAN
|
|
if (of_property_read_bool(dp, "little-endian"))
|
|
foreign_endian = FBINFO_FOREIGN_ENDIAN;
|
|
#else
|
|
if (of_property_read_bool(dp, "big-endian"))
|
|
foreign_endian = FBINFO_FOREIGN_ENDIAN;
|
|
#endif
|
|
|
|
pp = of_get_property(dp, "linux,bootx-depth", &len);
|
|
if (pp == NULL)
|
|
pp = of_get_property(dp, "depth", &len);
|
|
if (pp && len == sizeof(u32))
|
|
depth = be32_to_cpup(pp);
|
|
|
|
pp = of_get_property(dp, "linux,bootx-width", &len);
|
|
if (pp == NULL)
|
|
pp = of_get_property(dp, "width", &len);
|
|
if (pp && len == sizeof(u32))
|
|
width = be32_to_cpup(pp);
|
|
|
|
pp = of_get_property(dp, "linux,bootx-height", &len);
|
|
if (pp == NULL)
|
|
pp = of_get_property(dp, "height", &len);
|
|
if (pp && len == sizeof(u32))
|
|
height = be32_to_cpup(pp);
|
|
|
|
pp = of_get_property(dp, "linux,bootx-linebytes", &len);
|
|
if (pp == NULL)
|
|
pp = of_get_property(dp, "linebytes", &len);
|
|
if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
|
|
pitch = be32_to_cpup(pp);
|
|
else
|
|
pitch = width * ((depth + 7) / 8);
|
|
|
|
rsize = (unsigned long)pitch * (unsigned long)height;
|
|
|
|
/* Ok, now we try to figure out the address of the framebuffer.
|
|
*
|
|
* Unfortunately, Open Firmware doesn't provide a standard way to do
|
|
* so. All we can do is a dodgy heuristic that happens to work in
|
|
* practice. On most machines, the "address" property contains what
|
|
* we need, though not on Matrox cards found in IBM machines. What I've
|
|
* found that appears to give good results is to go through the PCI
|
|
* ranges and pick one that is both big enough and if possible encloses
|
|
* the "address" property. If none match, we pick the biggest
|
|
*/
|
|
up = of_get_property(dp, "linux,bootx-addr", &len);
|
|
if (up == NULL)
|
|
up = of_get_property(dp, "address", &len);
|
|
if (up && len == sizeof(u32))
|
|
addr_prop = *up;
|
|
|
|
/* Hack for when BootX is passing us */
|
|
if (no_real_node)
|
|
goto skip_addr;
|
|
|
|
for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
|
|
!= NULL; i++) {
|
|
int match_addrp = 0;
|
|
|
|
if (!(flags & IORESOURCE_MEM))
|
|
continue;
|
|
if (asize < rsize)
|
|
continue;
|
|
rstart = of_translate_address(dp, addrp);
|
|
if (rstart == OF_BAD_ADDR)
|
|
continue;
|
|
if (addr_prop && (rstart <= addr_prop) &&
|
|
((rstart + asize) >= (addr_prop + rsize)))
|
|
match_addrp = 1;
|
|
if (match_addrp) {
|
|
address = addr_prop;
|
|
break;
|
|
}
|
|
if (rsize > max_size) {
|
|
max_size = rsize;
|
|
address = OF_BAD_ADDR;
|
|
}
|
|
|
|
if (address == OF_BAD_ADDR)
|
|
address = rstart;
|
|
}
|
|
skip_addr:
|
|
if (address == OF_BAD_ADDR && addr_prop)
|
|
address = (u64)addr_prop;
|
|
if (address != OF_BAD_ADDR) {
|
|
#ifdef CONFIG_PCI
|
|
const __be32 *vidp, *didp;
|
|
u32 vid, did;
|
|
struct pci_dev *pdev;
|
|
|
|
vidp = of_get_property(dp, "vendor-id", NULL);
|
|
didp = of_get_property(dp, "device-id", NULL);
|
|
if (vidp && didp) {
|
|
vid = be32_to_cpup(vidp);
|
|
did = be32_to_cpup(didp);
|
|
pdev = pci_get_device(vid, did, NULL);
|
|
if (!pdev || pci_enable_device(pdev))
|
|
return;
|
|
}
|
|
#endif
|
|
/* kludge for valkyrie */
|
|
if (of_node_name_eq(dp, "valkyrie"))
|
|
address += 0x1000;
|
|
offb_init_fb(parent, no_real_node ? "bootx" : NULL,
|
|
width, height, depth, pitch, address,
|
|
foreign_endian, no_real_node ? NULL : dp);
|
|
}
|
|
}
|
|
|
|
static void offb_remove(struct platform_device *pdev)
|
|
{
|
|
struct fb_info *info = platform_get_drvdata(pdev);
|
|
|
|
if (info)
|
|
unregister_framebuffer(info);
|
|
}
|
|
|
|
static int offb_probe_bootx_noscreen(struct platform_device *pdev)
|
|
{
|
|
offb_init_nodriver(pdev, of_chosen, 1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver offb_driver_bootx_noscreen = {
|
|
.driver = {
|
|
.name = "bootx-noscreen",
|
|
},
|
|
.probe = offb_probe_bootx_noscreen,
|
|
.remove_new = offb_remove,
|
|
};
|
|
|
|
static int offb_probe_display(struct platform_device *pdev)
|
|
{
|
|
offb_init_nodriver(pdev, pdev->dev.of_node, 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id offb_of_match_display[] = {
|
|
{ .compatible = "display", },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, offb_of_match_display);
|
|
|
|
static struct platform_driver offb_driver_display = {
|
|
.driver = {
|
|
.name = "of-display",
|
|
.of_match_table = offb_of_match_display,
|
|
},
|
|
.probe = offb_probe_display,
|
|
.remove_new = offb_remove,
|
|
};
|
|
|
|
static int __init offb_init(void)
|
|
{
|
|
if (fb_get_options("offb", NULL))
|
|
return -ENODEV;
|
|
|
|
platform_driver_register(&offb_driver_bootx_noscreen);
|
|
platform_driver_register(&offb_driver_display);
|
|
|
|
return 0;
|
|
}
|
|
module_init(offb_init);
|
|
|
|
static void __exit offb_exit(void)
|
|
{
|
|
platform_driver_unregister(&offb_driver_display);
|
|
platform_driver_unregister(&offb_driver_bootx_noscreen);
|
|
}
|
|
module_exit(offb_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|