80 lines
2.7 KiB
C
80 lines
2.7 KiB
C
/*
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* DaVinci IO address definitions
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*
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* Copied from include/asm/arm/arch-omap/io.h
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifndef __ASM_ARCH_IO_H
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#define __ASM_ARCH_IO_H
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#define IO_SPACE_LIMIT 0xffffffff
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/*
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* ----------------------------------------------------------------------------
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* I/O mapping
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* ----------------------------------------------------------------------------
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*/
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#define IO_PHYS 0x01c00000
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#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */
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#define IO_SIZE 0x00400000
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#define IO_VIRT (IO_PHYS + IO_OFFSET)
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#define io_p2v(pa) ((pa) + IO_OFFSET)
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#define io_v2p(va) ((va) - IO_OFFSET)
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#define IO_ADDRESS(x) io_p2v(x)
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/*
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* We don't actually have real ISA nor PCI buses, but there is so many
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* drivers out there that might just work if we fake them...
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*/
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#define PCIO_BASE 0
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#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
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#define __mem_pci(a) (a)
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#define __mem_isa(a) (a)
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#ifndef __ASSEMBLER__
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/*
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* Functions to access the DaVinci IO region
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*
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* NOTE: - Use davinci_read/write[bwl] for physical register addresses
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* - Use __raw_read/write[bwl]() for virtual register addresses
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* - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses
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* - DO NOT use hardcoded virtual addresses to allow changing the
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* IO address space again if needed
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*/
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#define davinci_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a))
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#define davinci_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a))
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#define davinci_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a))
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#define davinci_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v))
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#define davinci_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v))
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#define davinci_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v))
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/* 16 bit uses LDRH/STRH, base +/- offset_8 */
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typedef struct { volatile u16 offset[256]; } __regbase16;
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#define __REGV16(vaddr) ((__regbase16 *)((vaddr)&~0xff)) \
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->offset[((vaddr)&0xff)>>1]
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#define __REG16(paddr) __REGV16(io_p2v(paddr))
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/* 8/32 bit uses LDR/STR, base +/- offset_12 */
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typedef struct { volatile u8 offset[4096]; } __regbase8;
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#define __REGV8(vaddr) ((__regbase8 *)((vaddr)&~4095)) \
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->offset[((vaddr)&4095)>>0]
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#define __REG8(paddr) __REGV8(io_p2v(paddr))
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typedef struct { volatile u32 offset[4096]; } __regbase32;
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#define __REGV32(vaddr) ((__regbase32 *)((vaddr)&~4095)) \
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->offset[((vaddr)&4095)>>2]
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#define __REG(paddr) __REGV32(io_p2v(paddr))
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#else
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#define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
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#endif /* __ASSEMBLER__ */
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#endif /* __ASM_ARCH_IO_H */
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