138 lines
3.4 KiB
C
138 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Versatile Express PL111 handling
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* Copyright (C) 2018 Linus Walleij
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*
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* This module binds to the "arm,vexpress-muxfpga" device on the
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* Versatile Express configuration bus and sets up which CLCD instance
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* gets muxed out on the DVI bridge.
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*/
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/vexpress.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include "pl111_drm.h"
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#include "pl111_vexpress.h"
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#define VEXPRESS_FPGAMUX_MOTHERBOARD 0x00
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#define VEXPRESS_FPGAMUX_DAUGHTERBOARD_1 0x01
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#define VEXPRESS_FPGAMUX_DAUGHTERBOARD_2 0x02
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int pl111_vexpress_clcd_init(struct device *dev,
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struct pl111_drm_dev_private *priv,
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struct regmap *map)
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{
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struct device_node *root;
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struct device_node *child;
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struct device_node *ct_clcd = NULL;
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bool has_coretile_clcd = false;
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bool has_coretile_hdlcd = false;
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bool mux_motherboard = true;
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u32 val;
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int ret;
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/*
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* Check if we have a CLCD or HDLCD on the core tile by checking if a
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* CLCD or HDLCD is available in the root of the device tree.
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*/
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root = of_find_node_by_path("/");
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if (!root)
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return -EINVAL;
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for_each_available_child_of_node(root, child) {
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if (of_device_is_compatible(child, "arm,pl111")) {
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has_coretile_clcd = true;
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ct_clcd = child;
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break;
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}
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if (of_device_is_compatible(child, "arm,hdlcd")) {
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has_coretile_hdlcd = true;
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break;
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}
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}
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of_node_put(root);
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/*
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* If there is a coretile HDLCD and it has a driver,
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* do not mux the CLCD on the motherboard to the DVI.
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*/
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if (has_coretile_hdlcd && IS_ENABLED(CONFIG_DRM_HDLCD))
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mux_motherboard = false;
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/*
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* On the Vexpress CA9 we let the CLCD on the coretile
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* take precedence, so also in this case do not mux the
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* motherboard to the DVI.
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*/
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if (has_coretile_clcd)
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mux_motherboard = false;
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if (mux_motherboard) {
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dev_info(dev, "DVI muxed to motherboard CLCD\n");
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val = VEXPRESS_FPGAMUX_MOTHERBOARD;
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} else if (ct_clcd == dev->of_node) {
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dev_info(dev,
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"DVI muxed to daughterboard 1 (core tile) CLCD\n");
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val = VEXPRESS_FPGAMUX_DAUGHTERBOARD_1;
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} else {
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dev_info(dev, "core tile graphics present\n");
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dev_info(dev, "this device will be deactivated\n");
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return -ENODEV;
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}
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ret = regmap_write(map, 0, val);
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if (ret) {
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dev_err(dev, "error setting DVI muxmode\n");
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return -ENODEV;
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}
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return 0;
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}
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/*
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* This sets up the regmap pointer that will then be retrieved by
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* the detection code in pl111_versatile.c and passed in to the
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* pl111_vexpress_clcd_init() function above.
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*/
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static int vexpress_muxfpga_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct regmap *map;
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map = devm_regmap_init_vexpress_config(&pdev->dev);
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if (IS_ERR(map))
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return PTR_ERR(map);
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dev_set_drvdata(dev, map);
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return 0;
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}
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static const struct of_device_id vexpress_muxfpga_match[] = {
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{ .compatible = "arm,vexpress-muxfpga", },
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{}
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};
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static struct platform_driver vexpress_muxfpga_driver = {
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.driver = {
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.name = "vexpress-muxfpga",
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.of_match_table = of_match_ptr(vexpress_muxfpga_match),
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},
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.probe = vexpress_muxfpga_probe,
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};
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int vexpress_muxfpga_init(void)
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{
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int ret;
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ret = platform_driver_register(&vexpress_muxfpga_driver);
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/* -EBUSY just means this driver is already registered */
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if (ret == -EBUSY)
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ret = 0;
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return ret;
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}
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