OpenCloudOS-Kernel/arch/openrisc
Linus Torvalds 1b044f1cfc Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer updates from Thomas Gleixner:
 "A rather large update for timers/timekeeping:

   - compat syscall consolidation (Al Viro)

   - Posix timer consolidation (Christoph Helwig / Thomas Gleixner)

   - Cleanup of the device tree based initialization for clockevents and
     clocksources (Daniel Lezcano)

   - Consolidation of the FTTMR010 clocksource/event driver (Linus
     Walleij)

   - The usual set of small fixes and updates all over the place"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (93 commits)
  timers: Make the cpu base lock raw
  clocksource/drivers/mips-gic-timer: Fix an error code in 'gic_clocksource_of_init()'
  clocksource/drivers/fsl_ftm_timer: Unmap region obtained by of_iomap
  clocksource/drivers/tcb_clksrc: Make IO endian agnostic
  clocksource/drivers/sun4i: Switch to the timer-of common init
  clocksource/drivers/timer-of: Fix invalid iomap check
  Revert "ktime: Simplify ktime_compare implementation"
  clocksource/drivers: Fix uninitialized variable use in timer_of_init
  kselftests: timers: Add test for frequency step
  kselftests: timers: Fix inconsistency-check to not ignore first timestamp
  time: Add warning about imminent deprecation of CONFIG_GENERIC_TIME_VSYSCALL_OLD
  time: Clean up CLOCK_MONOTONIC_RAW time handling
  posix-cpu-timers: Make timespec to nsec conversion safe
  itimer: Make timeval to nsec conversion range limited
  timers: Fix parameter description of try_to_del_timer_sync()
  ktime: Simplify ktime_compare implementation
  clocksource/drivers/fttmr010: Factor out clock read code
  clocksource/drivers/fttmr010: Implement delay timer
  clocksource/drivers: Add timer-of common init routine
  clocksource/drivers/tcb_clksrc: Save timer context on suspend/resume
  ...
2017-07-03 16:14:51 -07:00
..
boot/dts openrisc: use new common dtc rule 2012-12-03 17:17:48 -06:00
configs openrisc: Refresh or1ksim_defconfig for v3.12 2013-11-15 10:37:32 +01:00
include Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2017-07-03 16:14:51 -07:00
kernel arch: remove unused macro/function thread_saved_pc() 2017-06-28 16:13:57 -07:00
lib arch/openrisc/lib/memcpy.c: use correct OR1200 option 2017-02-25 05:08:46 +09:00
mm sched/headers: Prepare for new header dependencies before moving code to <linux/sched/signal.h> 2017-03-02 08:42:29 +01:00
Kconfig CONFIG_ARCH_HAS_RAW_COPY_USER is unconditional now 2017-04-26 12:11:01 -04:00
Makefile openrisc: Makefile: append "-D__linux__" to KBUILD_CFLAGS 2013-11-05 16:14:47 +01:00
README.openrisc openrisc: Updates after openrisc.net has been lost 2016-12-12 23:10:19 +09:00
TODO.openrisc openrisc: Add optimized memcpy routine 2017-02-25 04:14:36 +09:00

README.openrisc

OpenRISC Linux
==============

This is a port of Linux to the OpenRISC class of microprocessors; the initial
target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).

For information about OpenRISC processors and ongoing development:

	website		http://openrisc.io

For more information about Linux on OpenRISC, please contact South Pole AB.

	email:		info@southpole.se

	website:	http://southpole.se
			http://southpoleconsulting.com

---------------------------------------------------------------------

Build instructions for OpenRISC toolchain and Linux
===================================================

In order to build and run Linux for OpenRISC, you'll need at least a basic
toolchain and, perhaps, the architectural simulator.  Steps to get these bits
in place are outlined here.

1)  The toolchain can be obtained from openrisc.io.  Instructions for building
a toolchain can be found at:

https://github.com/openrisc/tutorials

2) or1ksim (optional)

or1ksim is the architectural simulator which will allow you to actually run
your OpenRISC Linux kernel if you don't have an OpenRISC processor at hand.

	git clone https://github.com/openrisc/or1ksim.git

	cd or1ksim
	./configure --prefix=$OPENRISC_PREFIX
	make
	make install

3)  Linux kernel

Build the kernel as usual

	make ARCH=openrisc defconfig
	make ARCH=openrisc

4)  Run in architectural simulator

Grab the or1ksim platform configuration file (from the or1ksim source) and
together with your freshly built vmlinux, run your kernel with the following
incantation:

	sim -f arch/openrisc/or1ksim.cfg vmlinux

---------------------------------------------------------------------

Terminology
===========

In the code, the following particles are used on symbols to limit the scope
to more or less specific processor implementations:

openrisc: the OpenRISC class of processors
or1k:     the OpenRISC 1000 family of processors
or1200:   the OpenRISC 1200 processor

---------------------------------------------------------------------

History
========

18. 11. 2003	Matjaz Breskvar (phoenix@bsemi.com)
	initial port of linux to OpenRISC/or32 architecture.
        all the core stuff is implemented and seams usable.

08. 12. 2003	Matjaz Breskvar (phoenix@bsemi.com)
	complete change of TLB miss handling.
	rewrite of exceptions handling.
	fully functional sash-3.6 in default initrd.
	a much improved version with changes all around.

10. 04. 2004	Matjaz Breskvar (phoenix@bsemi.com)
	alot of bugfixes all over.
	ethernet support, functional http and telnet servers.
	running many standard linux apps.

26. 06. 2004	Matjaz Breskvar (phoenix@bsemi.com)
	port to 2.6.x

30. 11. 2004	Matjaz Breskvar (phoenix@bsemi.com)
	lots of bugfixes and enhancments.
	added opencores framebuffer driver.

09. 10. 2010    Jonas Bonn (jonas@southpole.se)
	major rewrite to bring up to par with upstream Linux 2.6.36