399 lines
9.5 KiB
C
399 lines
9.5 KiB
C
/*
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* 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
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*
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* Copyright (C) 2015 Intel Corporation
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* Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/bitops.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/rational.h>
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#include <linux/dma/hsu.h>
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#include <linux/8250_pci.h>
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#include "8250.h"
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#define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b
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#define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c
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#define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d
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#define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191
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#define PCI_DEVICE_ID_INTEL_CDF_UART 0x18d8
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#define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8
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/* Intel MID Specific registers */
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#define INTEL_MID_UART_FISR 0x08
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#define INTEL_MID_UART_PS 0x30
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#define INTEL_MID_UART_MUL 0x34
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#define INTEL_MID_UART_DIV 0x38
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struct mid8250;
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struct mid8250_board {
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unsigned int flags;
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unsigned long freq;
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unsigned int base_baud;
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int (*setup)(struct mid8250 *, struct uart_port *p);
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void (*exit)(struct mid8250 *);
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};
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struct mid8250 {
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int line;
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int dma_index;
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struct pci_dev *dma_dev;
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struct uart_8250_dma dma;
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struct mid8250_board *board;
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struct hsu_dma_chip dma_chip;
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};
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/*****************************************************************************/
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static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
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{
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struct pci_dev *pdev = to_pci_dev(p->dev);
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switch (pdev->device) {
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case PCI_DEVICE_ID_INTEL_PNW_UART1:
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mid->dma_index = 0;
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break;
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case PCI_DEVICE_ID_INTEL_PNW_UART2:
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mid->dma_index = 1;
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break;
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case PCI_DEVICE_ID_INTEL_PNW_UART3:
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mid->dma_index = 2;
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break;
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default:
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return -EINVAL;
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}
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mid->dma_dev = pci_get_slot(pdev->bus,
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PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
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return 0;
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}
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static int tng_handle_irq(struct uart_port *p)
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{
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struct mid8250 *mid = p->private_data;
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struct uart_8250_port *up = up_to_u8250p(p);
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struct hsu_dma_chip *chip;
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u32 status;
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int ret = 0;
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int err;
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chip = pci_get_drvdata(mid->dma_dev);
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/* Rx DMA */
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err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
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if (err > 0) {
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serial8250_rx_dma_flush(up);
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ret |= 1;
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} else if (err == 0)
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ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);
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/* Tx DMA */
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err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
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if (err > 0)
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ret |= 1;
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else if (err == 0)
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ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status);
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/* UART */
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ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
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return IRQ_RETVAL(ret);
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}
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static int tng_setup(struct mid8250 *mid, struct uart_port *p)
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{
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struct pci_dev *pdev = to_pci_dev(p->dev);
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int index = PCI_FUNC(pdev->devfn);
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/*
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* Device 0000:00:04.0 is not a real HSU port. It provides a global
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* register set for all HSU ports, although it has the same PCI ID.
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* Skip it here.
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*/
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if (index-- == 0)
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return -ENODEV;
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mid->dma_index = index;
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mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
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p->handle_irq = tng_handle_irq;
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return 0;
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}
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static int dnv_handle_irq(struct uart_port *p)
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{
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struct mid8250 *mid = p->private_data;
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struct uart_8250_port *up = up_to_u8250p(p);
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unsigned int fisr = serial_port_in(p, INTEL_MID_UART_FISR);
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u32 status;
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int ret = 0;
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int err;
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if (fisr & BIT(2)) {
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err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
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if (err > 0) {
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serial8250_rx_dma_flush(up);
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ret |= 1;
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} else if (err == 0)
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ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
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}
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if (fisr & BIT(1)) {
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err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
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if (err > 0)
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ret |= 1;
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else if (err == 0)
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ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
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}
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if (fisr & BIT(0))
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ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
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return IRQ_RETVAL(ret);
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}
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#define DNV_DMA_CHAN_OFFSET 0x80
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static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
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{
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struct hsu_dma_chip *chip = &mid->dma_chip;
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struct pci_dev *pdev = to_pci_dev(p->dev);
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unsigned int bar = FL_GET_BASE(mid->board->flags);
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int ret;
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pci_set_master(pdev);
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ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
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if (ret < 0)
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return ret;
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p->irq = pci_irq_vector(pdev, 0);
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chip->dev = &pdev->dev;
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chip->irq = pci_irq_vector(pdev, 0);
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chip->regs = p->membase;
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chip->length = pci_resource_len(pdev, bar);
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chip->offset = DNV_DMA_CHAN_OFFSET;
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/* Falling back to PIO mode if DMA probing fails */
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ret = hsu_dma_probe(chip);
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if (ret)
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return 0;
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mid->dma_dev = pdev;
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p->handle_irq = dnv_handle_irq;
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return 0;
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}
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static void dnv_exit(struct mid8250 *mid)
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{
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if (!mid->dma_dev)
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return;
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hsu_dma_remove(&mid->dma_chip);
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}
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/*****************************************************************************/
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static void mid8250_set_termios(struct uart_port *p,
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struct ktermios *termios,
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struct ktermios *old)
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{
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unsigned int baud = tty_termios_baud_rate(termios);
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struct mid8250 *mid = p->private_data;
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unsigned short ps = 16;
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unsigned long fuart = baud * ps;
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unsigned long w = BIT(24) - 1;
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unsigned long mul, div;
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/* Gracefully handle the B0 case: fall back to B9600 */
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fuart = fuart ? fuart : 9600 * 16;
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if (mid->board->freq < fuart) {
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/* Find prescaler value that satisfies Fuart < Fref */
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if (mid->board->freq > baud)
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ps = mid->board->freq / baud; /* baud rate too high */
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else
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ps = 1; /* PLL case */
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fuart = baud * ps;
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} else {
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/* Get Fuart closer to Fref */
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fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
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}
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rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
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p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */
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writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */
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writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */
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writel(div, p->membase + INTEL_MID_UART_DIV);
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serial8250_do_set_termios(p, termios, old);
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}
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static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
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{
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struct hsu_dma_slave *s = param;
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if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
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return false;
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chan->private = s;
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return true;
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}
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static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
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{
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struct uart_8250_dma *dma = &mid->dma;
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struct device *dev = port->port.dev;
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struct hsu_dma_slave *rx_param;
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struct hsu_dma_slave *tx_param;
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if (!mid->dma_dev)
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return 0;
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rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
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if (!rx_param)
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return -ENOMEM;
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tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
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if (!tx_param)
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return -ENOMEM;
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rx_param->chan_id = mid->dma_index * 2 + 1;
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tx_param->chan_id = mid->dma_index * 2;
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dma->rxconf.src_maxburst = 64;
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dma->txconf.dst_maxburst = 64;
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rx_param->dma_dev = &mid->dma_dev->dev;
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tx_param->dma_dev = &mid->dma_dev->dev;
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dma->fn = mid8250_dma_filter;
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dma->rx_param = rx_param;
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dma->tx_param = tx_param;
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port->dma = dma;
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return 0;
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}
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static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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struct uart_8250_port uart;
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struct mid8250 *mid;
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unsigned int bar;
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int ret;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
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if (!mid)
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return -ENOMEM;
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mid->board = (struct mid8250_board *)id->driver_data;
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bar = FL_GET_BASE(mid->board->flags);
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memset(&uart, 0, sizeof(struct uart_8250_port));
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uart.port.dev = &pdev->dev;
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uart.port.irq = pdev->irq;
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uart.port.private_data = mid;
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uart.port.type = PORT_16750;
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uart.port.iotype = UPIO_MEM;
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uart.port.uartclk = mid->board->base_baud * 16;
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uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
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uart.port.set_termios = mid8250_set_termios;
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uart.port.mapbase = pci_resource_start(pdev, bar);
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uart.port.membase = pcim_iomap(pdev, bar, 0);
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if (!uart.port.membase)
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return -ENOMEM;
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if (mid->board->setup) {
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ret = mid->board->setup(mid, &uart.port);
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if (ret)
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return ret;
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}
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ret = mid8250_dma_setup(mid, &uart);
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if (ret)
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goto err;
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ret = serial8250_register_8250_port(&uart);
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if (ret < 0)
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goto err;
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mid->line = ret;
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pci_set_drvdata(pdev, mid);
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return 0;
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err:
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if (mid->board->exit)
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mid->board->exit(mid);
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return ret;
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}
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static void mid8250_remove(struct pci_dev *pdev)
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{
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struct mid8250 *mid = pci_get_drvdata(pdev);
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serial8250_unregister_port(mid->line);
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if (mid->board->exit)
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mid->board->exit(mid);
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}
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static const struct mid8250_board pnw_board = {
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.flags = FL_BASE0,
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.freq = 50000000,
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.base_baud = 115200,
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.setup = pnw_setup,
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};
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static const struct mid8250_board tng_board = {
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.flags = FL_BASE0,
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.freq = 38400000,
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.base_baud = 1843200,
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.setup = tng_setup,
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};
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static const struct mid8250_board dnv_board = {
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.flags = FL_BASE1,
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.freq = 133333333,
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.base_baud = 115200,
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.setup = dnv_setup,
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.exit = dnv_exit,
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};
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#define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }
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static const struct pci_device_id pci_ids[] = {
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MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board),
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MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board),
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MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board),
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MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board),
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MID_DEVICE(PCI_DEVICE_ID_INTEL_CDF_UART, dnv_board),
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MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board),
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{ },
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};
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MODULE_DEVICE_TABLE(pci, pci_ids);
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static struct pci_driver mid8250_pci_driver = {
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.name = "8250_mid",
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.id_table = pci_ids,
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.probe = mid8250_probe,
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.remove = mid8250_remove,
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};
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module_pci_driver(mid8250_pci_driver);
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MODULE_AUTHOR("Intel Corporation");
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Intel MID UART driver");
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