178 lines
5.4 KiB
Plaintext
178 lines
5.4 KiB
Plaintext
/*
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* Copyright 2015 Freescale Semiconductor, Inc.
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* Copyright 2016 Toradex AG
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "imx7s.dtsi"
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#include <dt-bindings/reset/imx7-reset.h>
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/ {
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cpus {
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cpu0: cpu@0 {
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operating-points = <
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/* KHz uV */
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996000 1075000
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792000 975000
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>;
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clock-frequency = <996000000>;
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};
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cpu1: cpu@1 {
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compatible = "arm,cortex-a7";
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device_type = "cpu";
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reg = <1>;
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clock-frequency = <996000000>;
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};
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};
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soc {
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etm@3007d000 {
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compatible = "arm,coresight-etm3x", "arm,primecell";
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reg = <0x3007d000 0x1000>;
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/*
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* System will hang if added nosmp in kernel command line
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* without arm,primecell-periphid because amba bus try to
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* read id and core1 power off at this time.
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*/
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arm,primecell-periphid = <0xbb956>;
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cpu = <&cpu1>;
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clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
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clock-names = "apb_pclk";
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port {
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etm1_out_port: endpoint {
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remote-endpoint = <&ca_funnel_in_port1>;
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};
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};
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};
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};
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};
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&aips3 {
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usbotg2: usb@30b20000 {
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compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
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reg = <0x30b20000 0x200>;
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interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX7D_USB_CTRL_CLK>;
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fsl,usbphy = <&usbphynop2>;
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fsl,usbmisc = <&usbmisc2 0>;
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phy-clkgate-delay-us = <400>;
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status = "disabled";
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};
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usbmisc2: usbmisc@30b20200 {
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#index-cells = <1>;
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compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
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reg = <0x30b20200 0x200>;
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};
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usbphynop2: usbphynop2 {
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compatible = "usb-nop-xceiv";
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clocks = <&clks IMX7D_USB_PHY2_CLK>;
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clock-names = "main_clk";
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};
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fec2: ethernet@30bf0000 {
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compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
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reg = <0x30bf0000 0x10000>;
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interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
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<&clks IMX7D_ENET_AXI_ROOT_CLK>,
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<&clks IMX7D_ENET2_TIME_ROOT_CLK>,
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<&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
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<&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
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clock-names = "ipg", "ahb", "ptp",
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"enet_clk_ref", "enet_out";
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fsl,num-tx-queues=<3>;
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fsl,num-rx-queues=<3>;
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status = "disabled";
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};
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pcie: pcie@0x33800000 {
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compatible = "fsl,imx7d-pcie", "snps,dw-pcie";
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reg = <0x33800000 0x4000>,
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<0x4ff00000 0x80000>;
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reg-names = "dbi", "config";
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000 /* downstream I/O */
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0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */
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num-lanes = <1>;
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interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>,
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<&clks IMX7D_PLL_ENET_MAIN_100M_CLK>,
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<&clks IMX7D_PCIE_PHY_ROOT_CLK>;
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clock-names = "pcie", "pcie_bus", "pcie_phy";
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assigned-clocks = <&clks IMX7D_PCIE_CTRL_ROOT_SRC>,
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<&clks IMX7D_PCIE_PHY_ROOT_SRC>;
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assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>,
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<&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
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fsl,max-link-speed = <2>;
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power-domains = <&pgc_pcie_phy>;
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resets = <&src IMX7_RESET_PCIEPHY>,
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<&src IMX7_RESET_PCIE_CTRL_APPS_EN>;
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reset-names = "pciephy", "apps";
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status = "disabled";
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};
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};
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&ca_funnel_ports {
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port@1 {
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reg = <1>;
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ca_funnel_in_port1: endpoint {
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slave-mode;
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remote-endpoint = <&etm1_out_port>;
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};
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};
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};
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