177 lines
4.9 KiB
C
177 lines
4.9 KiB
C
/*
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* Lyrtech SFFSDR board support.
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*
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* Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
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* Copyright (C) 2008 Lyrtech <www.lyrtech.com>
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*
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* Based on DV-EVM platform, original copyright follows:
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*
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* Copyright (C) 2007 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/i2c/at24.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <mach/dm644x.h>
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#include <mach/common.h>
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#include <mach/i2c.h>
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#include <mach/serial.h>
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#include <mach/mux.h>
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#define SFFSDR_PHY_MASK (0x2)
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#define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
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#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
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#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
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struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
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/* U-Boot Environment: Block 0
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* UBL: Block 1
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* U-Boot: Blocks 6-7 (256 kb)
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* Integrity Kernel: Blocks 8-31 (3 Mb)
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* Integrity Data: Blocks 100-END
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*/
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{
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.name = "Linux Kernel",
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.offset = 32 * SZ_128K,
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.size = 16 * SZ_128K, /* 2 Mb */
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.mask_flags = MTD_WRITEABLE, /* Force read-only */
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},
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{
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.name = "Linux ROOT",
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.offset = MTDPART_OFS_APPEND,
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.size = 256 * SZ_128K, /* 32 Mb */
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.mask_flags = 0, /* R/W */
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},
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};
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static struct flash_platform_data davinci_sffsdr_nandflash_data = {
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.parts = davinci_sffsdr_nandflash_partition,
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.nr_parts = ARRAY_SIZE(davinci_sffsdr_nandflash_partition),
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};
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static struct resource davinci_sffsdr_nandflash_resource[] = {
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{
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.start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
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.end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
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.end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device davinci_sffsdr_nandflash_device = {
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.name = "davinci_nand", /* Name of driver */
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.id = 0,
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.dev = {
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.platform_data = &davinci_sffsdr_nandflash_data,
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},
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.num_resources = ARRAY_SIZE(davinci_sffsdr_nandflash_resource),
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.resource = davinci_sffsdr_nandflash_resource,
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};
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static struct emac_platform_data sffsdr_emac_pdata = {
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.phy_mask = SFFSDR_PHY_MASK,
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.mdio_max_freq = SFFSDR_MDIO_FREQUENCY,
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};
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static struct at24_platform_data eeprom_info = {
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.byte_len = (64*1024) / 8,
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.page_size = 32,
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.flags = AT24_FLAG_ADDR16,
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};
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static struct i2c_board_info __initdata i2c_info[] = {
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{
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I2C_BOARD_INFO("24lc64", 0x50),
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.platform_data = &eeprom_info,
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},
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/* Other I2C devices:
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* MSP430, addr 0x23 (not used)
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* PCA9543, addr 0x70 (setup done by U-Boot)
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* ADS7828, addr 0x48 (ADC for voltage monitoring.)
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*/
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};
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static struct davinci_i2c_platform_data i2c_pdata = {
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.bus_freq = 20 /* kHz */,
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.bus_delay = 100 /* usec */,
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};
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static void __init sffsdr_init_i2c(void)
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{
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davinci_init_i2c(&i2c_pdata);
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i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
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}
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static struct platform_device *davinci_sffsdr_devices[] __initdata = {
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&davinci_sffsdr_nandflash_device,
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};
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static struct davinci_uart_config uart_config __initdata = {
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.enabled_uarts = (1 << 0),
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};
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static void __init davinci_sffsdr_map_io(void)
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{
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dm644x_init();
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}
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static __init void davinci_sffsdr_init(void)
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{
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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platform_add_devices(davinci_sffsdr_devices,
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ARRAY_SIZE(davinci_sffsdr_devices));
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sffsdr_init_i2c();
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davinci_serial_init(&uart_config);
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soc_info->emac_pdata->phy_mask = SFFSDR_PHY_MASK;
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soc_info->emac_pdata->mdio_max_freq = SFFSDR_MDIO_FREQUENCY;
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setup_usb(0, 0); /* We support only peripheral mode. */
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/* mux VLYNQ pins */
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davinci_cfg_reg(DM644X_VLYNQEN);
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davinci_cfg_reg(DM644X_VLYNQWD);
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}
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static __init void davinci_sffsdr_irq_init(void)
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{
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davinci_irq_init();
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}
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MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
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/* Maintainer: Hugo Villeneuve hugo.villeneuve@lyrtech.com */
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.phys_io = IO_PHYS,
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.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
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.boot_params = (DAVINCI_DDR_BASE + 0x100),
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.map_io = davinci_sffsdr_map_io,
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.init_irq = davinci_sffsdr_irq_init,
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.timer = &davinci_timer,
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.init_machine = davinci_sffsdr_init,
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MACHINE_END
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