48 lines
1.5 KiB
C
48 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018, Intel Corporation. */
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#ifndef _ICE_SCHED_H_
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#define _ICE_SCHED_H_
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#include "ice_common.h"
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#define ICE_QGRP_LAYER_OFFSET 2
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#define ICE_VSI_LAYER_OFFSET 4
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struct ice_sched_agg_vsi_info {
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struct list_head list_entry;
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DECLARE_BITMAP(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
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u16 vsi_handle;
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};
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struct ice_sched_agg_info {
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struct list_head agg_vsi_list;
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struct list_head list_entry;
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DECLARE_BITMAP(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
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u32 agg_id;
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enum ice_agg_type agg_type;
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};
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/* FW AQ command calls */
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enum ice_status ice_sched_init_port(struct ice_port_info *pi);
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enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw);
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void ice_sched_clear_port(struct ice_port_info *pi);
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void ice_sched_cleanup_all(struct ice_hw *hw);
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void ice_sched_clear_agg(struct ice_hw *hw);
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struct ice_sched_node *
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ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid);
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enum ice_status
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ice_sched_add_node(struct ice_port_info *pi, u8 layer,
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struct ice_aqc_txsched_elem_data *info);
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void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node);
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struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc);
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struct ice_sched_node *
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ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
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u8 owner);
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enum ice_status
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ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
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u8 owner, bool enable);
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enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle);
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#endif /* _ICE_SCHED_H_ */
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