314 lines
8.3 KiB
C
314 lines
8.3 KiB
C
/*
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* Copyright (c) 2011-2014, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _NVME_H
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#define _NVME_H
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#include <linux/nvme.h>
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#include <linux/pci.h>
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#include <linux/kref.h>
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#include <linux/blk-mq.h>
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enum {
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/*
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* Driver internal status code for commands that were cancelled due
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* to timeouts or controller shutdown. The value is negative so
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* that it a) doesn't overlap with the unsigned hardware error codes,
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* and b) can easily be tested for.
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*/
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NVME_SC_CANCELLED = -EINTR,
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};
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extern unsigned char nvme_io_timeout;
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#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
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extern unsigned char admin_timeout;
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#define ADMIN_TIMEOUT (admin_timeout * HZ)
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extern unsigned char shutdown_timeout;
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#define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
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enum {
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NVME_NS_LBA = 0,
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NVME_NS_LIGHTNVM = 1,
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};
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/*
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* List of workarounds for devices that required behavior not specified in
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* the standard.
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*/
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enum nvme_quirks {
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/*
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* Prefers I/O aligned to a stripe size specified in a vendor
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* specific Identify field.
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*/
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NVME_QUIRK_STRIPE_SIZE = (1 << 0),
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/*
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* The controller doesn't handle Identify value others than 0 or 1
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* correctly.
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*/
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NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
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/*
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* The controller deterministically returns O's on reads to discarded
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* logical blocks.
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*/
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NVME_QUIRK_DISCARD_ZEROES = (1 << 2),
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};
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struct nvme_ctrl {
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const struct nvme_ctrl_ops *ops;
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struct request_queue *admin_q;
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struct device *dev;
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struct kref kref;
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int instance;
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struct blk_mq_tag_set *tagset;
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struct list_head namespaces;
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struct mutex namespaces_mutex;
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struct device *device; /* char device */
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struct list_head node;
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struct ida ns_ida;
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char name[12];
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char serial[20];
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char model[40];
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char firmware_rev[8];
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int cntlid;
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u32 ctrl_config;
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u32 page_size;
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u32 max_hw_sectors;
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u32 stripe_size;
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u16 oncs;
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u16 vid;
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atomic_t abort_limit;
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u8 event_limit;
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u8 vwc;
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u32 vs;
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bool subsystem;
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unsigned long quirks;
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};
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/*
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* An NVM Express namespace is equivalent to a SCSI LUN
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*/
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struct nvme_ns {
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struct list_head list;
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struct nvme_ctrl *ctrl;
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struct request_queue *queue;
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struct gendisk *disk;
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struct kref kref;
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int instance;
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u8 eui[8];
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u8 uuid[16];
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unsigned ns_id;
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int lba_shift;
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u16 ms;
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bool ext;
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u8 pi_type;
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int type;
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unsigned long flags;
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#define NVME_NS_REMOVING 0
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#define NVME_NS_DEAD 1
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u64 mode_select_num_blocks;
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u32 mode_select_block_len;
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};
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struct nvme_ctrl_ops {
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struct module *module;
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int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
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int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
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int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
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bool (*io_incapable)(struct nvme_ctrl *ctrl);
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int (*reset_ctrl)(struct nvme_ctrl *ctrl);
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void (*free_ctrl)(struct nvme_ctrl *ctrl);
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};
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static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
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{
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u32 val = 0;
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if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
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return false;
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return val & NVME_CSTS_RDY;
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}
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static inline bool nvme_io_incapable(struct nvme_ctrl *ctrl)
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{
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u32 val = 0;
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if (ctrl->ops->io_incapable(ctrl))
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return true;
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if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
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return true;
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return val & NVME_CSTS_CFS;
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}
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static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
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{
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if (!ctrl->subsystem)
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return -ENOTTY;
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return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
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}
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static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
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{
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return (sector >> (ns->lba_shift - 9));
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}
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static inline void nvme_setup_flush(struct nvme_ns *ns,
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struct nvme_command *cmnd)
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{
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memset(cmnd, 0, sizeof(*cmnd));
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cmnd->common.opcode = nvme_cmd_flush;
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cmnd->common.nsid = cpu_to_le32(ns->ns_id);
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}
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static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
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struct nvme_command *cmnd)
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{
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u16 control = 0;
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u32 dsmgmt = 0;
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if (req->cmd_flags & REQ_FUA)
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control |= NVME_RW_FUA;
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if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
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control |= NVME_RW_LR;
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if (req->cmd_flags & REQ_RAHEAD)
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dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
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memset(cmnd, 0, sizeof(*cmnd));
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cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
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cmnd->rw.command_id = req->tag;
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cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
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cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
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cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
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if (ns->ms) {
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switch (ns->pi_type) {
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case NVME_NS_DPS_PI_TYPE3:
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control |= NVME_RW_PRINFO_PRCHK_GUARD;
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break;
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case NVME_NS_DPS_PI_TYPE1:
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case NVME_NS_DPS_PI_TYPE2:
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control |= NVME_RW_PRINFO_PRCHK_GUARD |
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NVME_RW_PRINFO_PRCHK_REF;
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cmnd->rw.reftag = cpu_to_le32(
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nvme_block_nr(ns, blk_rq_pos(req)));
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break;
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}
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if (!blk_integrity_rq(req))
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control |= NVME_RW_PRINFO_PRACT;
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}
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cmnd->rw.control = cpu_to_le16(control);
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cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
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}
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static inline int nvme_error_status(u16 status)
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{
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switch (status & 0x7ff) {
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case NVME_SC_SUCCESS:
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return 0;
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case NVME_SC_CAP_EXCEEDED:
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return -ENOSPC;
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default:
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return -EIO;
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}
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}
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static inline bool nvme_req_needs_retry(struct request *req, u16 status)
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{
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return !(status & NVME_SC_DNR || blk_noretry_request(req)) &&
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(jiffies - req->start_time) < req->timeout;
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}
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int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
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int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
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int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
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int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
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const struct nvme_ctrl_ops *ops, unsigned long quirks);
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void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
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void nvme_put_ctrl(struct nvme_ctrl *ctrl);
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int nvme_init_identify(struct nvme_ctrl *ctrl);
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void nvme_scan_namespaces(struct nvme_ctrl *ctrl);
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void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
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void nvme_stop_queues(struct nvme_ctrl *ctrl);
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void nvme_start_queues(struct nvme_ctrl *ctrl);
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void nvme_kill_queues(struct nvme_ctrl *ctrl);
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struct request *nvme_alloc_request(struct request_queue *q,
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struct nvme_command *cmd, unsigned int flags);
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void nvme_requeue_req(struct request *req);
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int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
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void *buf, unsigned bufflen);
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int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
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struct nvme_completion *cqe, void *buffer, unsigned bufflen,
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unsigned timeout);
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int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
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void __user *ubuffer, unsigned bufflen, u32 *result,
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unsigned timeout);
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int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
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void __user *ubuffer, unsigned bufflen,
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void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
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u32 *result, unsigned timeout);
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int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id);
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int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
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struct nvme_id_ns **id);
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int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log);
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int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
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dma_addr_t dma_addr, u32 *result);
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int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
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dma_addr_t dma_addr, u32 *result);
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int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
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struct sg_io_hdr;
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int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
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int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
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int nvme_sg_get_version_num(int __user *ip);
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#ifdef CONFIG_NVM
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int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
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int nvme_nvm_register(struct request_queue *q, char *disk_name);
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void nvme_nvm_unregister(struct request_queue *q, char *disk_name);
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#else
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static inline int nvme_nvm_register(struct request_queue *q, char *disk_name)
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{
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return 0;
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}
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static inline void nvme_nvm_unregister(struct request_queue *q, char *disk_name) {};
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static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id)
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{
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return 0;
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}
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#endif /* CONFIG_NVM */
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int __init nvme_core_init(void);
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void nvme_core_exit(void);
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#endif /* _NVME_H */
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