455 lines
13 KiB
C
455 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Intel La Jolla Cove Adapter USB-GPIO driver
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*
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* Copyright (c) 2023, Intel Corporation.
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*/
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#include <linux/acpi.h>
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/dev_printk.h>
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#include <linux/gpio/driver.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/kref.h>
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#include <linux/mfd/ljca.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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/* GPIO commands */
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#define LJCA_GPIO_CONFIG 1
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#define LJCA_GPIO_READ 2
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#define LJCA_GPIO_WRITE 3
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#define LJCA_GPIO_INT_EVENT 4
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#define LJCA_GPIO_INT_MASK 5
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#define LJCA_GPIO_INT_UNMASK 6
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#define LJCA_GPIO_CONF_DISABLE BIT(0)
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#define LJCA_GPIO_CONF_INPUT BIT(1)
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#define LJCA_GPIO_CONF_OUTPUT BIT(2)
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#define LJCA_GPIO_CONF_PULLUP BIT(3)
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#define LJCA_GPIO_CONF_PULLDOWN BIT(4)
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#define LJCA_GPIO_CONF_DEFAULT BIT(5)
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#define LJCA_GPIO_CONF_INTERRUPT BIT(6)
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#define LJCA_GPIO_INT_TYPE BIT(7)
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#define LJCA_GPIO_CONF_EDGE FIELD_PREP(LJCA_GPIO_INT_TYPE, 1)
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#define LJCA_GPIO_CONF_LEVEL FIELD_PREP(LJCA_GPIO_INT_TYPE, 0)
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/* Intentional overlap with PULLUP / PULLDOWN */
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#define LJCA_GPIO_CONF_SET BIT(3)
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#define LJCA_GPIO_CONF_CLR BIT(4)
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struct gpio_op {
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u8 index;
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u8 value;
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} __packed;
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struct gpio_packet {
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u8 num;
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struct gpio_op item[];
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} __packed;
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#define LJCA_GPIO_BUF_SIZE 60
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struct ljca_gpio_dev {
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struct platform_device *pdev;
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struct gpio_chip gc;
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struct ljca_gpio_info *gpio_info;
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DECLARE_BITMAP(unmasked_irqs, LJCA_MAX_GPIO_NUM);
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DECLARE_BITMAP(enabled_irqs, LJCA_MAX_GPIO_NUM);
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DECLARE_BITMAP(reenable_irqs, LJCA_MAX_GPIO_NUM);
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u8 *connect_mode;
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/* mutex to protect irq bus */
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struct mutex irq_lock;
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struct work_struct work;
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/* lock to protect package transfer to Hardware */
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struct mutex trans_lock;
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u8 obuf[LJCA_GPIO_BUF_SIZE];
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u8 ibuf[LJCA_GPIO_BUF_SIZE];
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};
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static int gpio_config(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id, u8 config)
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{
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struct gpio_packet *packet = (struct gpio_packet *)ljca_gpio->obuf;
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int ret;
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mutex_lock(&ljca_gpio->trans_lock);
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packet->item[0].index = gpio_id;
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packet->item[0].value = config | ljca_gpio->connect_mode[gpio_id];
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packet->num = 1;
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ret = ljca_transfer(ljca_gpio->gpio_info->ljca, LJCA_GPIO_CONFIG, packet,
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struct_size(packet, item, packet->num), NULL, NULL);
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mutex_unlock(&ljca_gpio->trans_lock);
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return ret;
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}
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static int ljca_gpio_read(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id)
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{
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struct gpio_packet *packet = (struct gpio_packet *)ljca_gpio->obuf;
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struct gpio_packet *ack_packet = (struct gpio_packet *)ljca_gpio->ibuf;
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unsigned int ibuf_len = LJCA_GPIO_BUF_SIZE;
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int ret;
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mutex_lock(&ljca_gpio->trans_lock);
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packet->num = 1;
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packet->item[0].index = gpio_id;
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ret = ljca_transfer(ljca_gpio->gpio_info->ljca, LJCA_GPIO_READ, packet,
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struct_size(packet, item, packet->num), ljca_gpio->ibuf, &ibuf_len);
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if (ret)
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goto out_unlock;
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if (!ibuf_len || ack_packet->num != packet->num) {
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dev_err(&ljca_gpio->pdev->dev, "failed gpio_id:%u %u", gpio_id, ack_packet->num);
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ret = -EIO;
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}
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out_unlock:
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mutex_unlock(&ljca_gpio->trans_lock);
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if (ret)
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return ret;
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return ack_packet->item[0].value > 0;
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}
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static int ljca_gpio_write(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id,
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int value)
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{
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struct gpio_packet *packet = (struct gpio_packet *)ljca_gpio->obuf;
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int ret;
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mutex_lock(&ljca_gpio->trans_lock);
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packet->num = 1;
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packet->item[0].index = gpio_id;
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packet->item[0].value = value & 1;
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ret = ljca_transfer(ljca_gpio->gpio_info->ljca, LJCA_GPIO_WRITE, packet,
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struct_size(packet, item, packet->num), NULL, NULL);
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mutex_unlock(&ljca_gpio->trans_lock);
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return ret;
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}
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static int ljca_gpio_get_value(struct gpio_chip *chip, unsigned int offset)
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{
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struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
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return ljca_gpio_read(ljca_gpio, offset);
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}
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static void ljca_gpio_set_value(struct gpio_chip *chip, unsigned int offset,
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int val)
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{
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struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
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int ret;
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ret = ljca_gpio_write(ljca_gpio, offset, val);
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if (ret)
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dev_err(chip->parent, "offset:%u val:%d set value failed %d\n", offset, val, ret);
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}
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static int ljca_gpio_direction_input(struct gpio_chip *chip,
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unsigned int offset)
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{
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struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
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u8 config = LJCA_GPIO_CONF_INPUT | LJCA_GPIO_CONF_CLR;
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return gpio_config(ljca_gpio, offset, config);
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}
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static int ljca_gpio_direction_output(struct gpio_chip *chip,
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unsigned int offset, int val)
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{
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struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
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u8 config = LJCA_GPIO_CONF_OUTPUT | LJCA_GPIO_CONF_CLR;
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int ret;
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ret = gpio_config(ljca_gpio, offset, config);
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if (ret)
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return ret;
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ljca_gpio_set_value(chip, offset, val);
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return 0;
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}
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static int ljca_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
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unsigned long config)
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{
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struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
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ljca_gpio->connect_mode[offset] = 0;
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switch (pinconf_to_config_param(config)) {
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case PIN_CONFIG_BIAS_PULL_UP:
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ljca_gpio->connect_mode[offset] |= LJCA_GPIO_CONF_PULLUP;
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break;
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case PIN_CONFIG_BIAS_PULL_DOWN:
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ljca_gpio->connect_mode[offset] |= LJCA_GPIO_CONF_PULLDOWN;
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break;
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case PIN_CONFIG_DRIVE_PUSH_PULL:
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case PIN_CONFIG_PERSIST_STATE:
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break;
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default:
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return -ENOTSUPP;
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}
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return 0;
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}
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static int ljca_gpio_init_valid_mask(struct gpio_chip *chip, unsigned long *valid_mask,
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unsigned int ngpios)
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{
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struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
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WARN_ON_ONCE(ngpios != ljca_gpio->gpio_info->num);
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bitmap_copy(valid_mask, ljca_gpio->gpio_info->valid_pin_map, ngpios);
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return 0;
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}
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static void ljca_gpio_irq_init_valid_mask(struct gpio_chip *chip, unsigned long *valid_mask,
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unsigned int ngpios)
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{
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ljca_gpio_init_valid_mask(chip, valid_mask, ngpios);
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}
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static int ljca_enable_irq(struct ljca_gpio_dev *ljca_gpio, int gpio_id, bool enable)
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{
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struct gpio_packet *packet = (struct gpio_packet *)ljca_gpio->obuf;
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int ret;
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mutex_lock(&ljca_gpio->trans_lock);
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packet->num = 1;
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packet->item[0].index = gpio_id;
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packet->item[0].value = 0;
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ret = ljca_transfer(ljca_gpio->gpio_info->ljca,
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enable ? LJCA_GPIO_INT_UNMASK : LJCA_GPIO_INT_MASK, packet,
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struct_size(packet, item, packet->num), NULL, NULL);
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mutex_unlock(&ljca_gpio->trans_lock);
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return ret;
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}
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static void ljca_gpio_async(struct work_struct *work)
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{
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struct ljca_gpio_dev *ljca_gpio = container_of(work, struct ljca_gpio_dev, work);
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int gpio_id;
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int unmasked;
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for_each_set_bit(gpio_id, ljca_gpio->reenable_irqs, ljca_gpio->gc.ngpio) {
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clear_bit(gpio_id, ljca_gpio->reenable_irqs);
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unmasked = test_bit(gpio_id, ljca_gpio->unmasked_irqs);
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if (unmasked)
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ljca_enable_irq(ljca_gpio, gpio_id, true);
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}
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}
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static void ljca_gpio_event_cb(void *context, u8 cmd, const void *evt_data, int len)
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{
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const struct gpio_packet *packet = evt_data;
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struct ljca_gpio_dev *ljca_gpio = context;
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int i;
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int irq;
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if (cmd != LJCA_GPIO_INT_EVENT)
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return;
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for (i = 0; i < packet->num; i++) {
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irq = irq_find_mapping(ljca_gpio->gc.irq.domain, packet->item[i].index);
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if (!irq) {
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dev_err(ljca_gpio->gc.parent, "gpio_id %u does not mapped to IRQ yet\n",
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packet->item[i].index);
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return;
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}
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generic_handle_domain_irq(ljca_gpio->gc.irq.domain, irq);
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set_bit(packet->item[i].index, ljca_gpio->reenable_irqs);
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}
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schedule_work(&ljca_gpio->work);
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}
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static void ljca_irq_unmask(struct irq_data *irqd)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
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struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
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int gpio_id = irqd_to_hwirq(irqd);
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gpiochip_enable_irq(gc, gpio_id);
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set_bit(gpio_id, ljca_gpio->unmasked_irqs);
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}
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static void ljca_irq_mask(struct irq_data *irqd)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
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struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
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int gpio_id = irqd_to_hwirq(irqd);
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clear_bit(gpio_id, ljca_gpio->unmasked_irqs);
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gpiochip_disable_irq(gc, gpio_id);
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}
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static int ljca_irq_set_type(struct irq_data *irqd, unsigned int type)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
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struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
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int gpio_id = irqd_to_hwirq(irqd);
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ljca_gpio->connect_mode[gpio_id] = LJCA_GPIO_CONF_INTERRUPT;
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switch (type) {
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case IRQ_TYPE_LEVEL_HIGH:
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ljca_gpio->connect_mode[gpio_id] |= (LJCA_GPIO_CONF_LEVEL | LJCA_GPIO_CONF_PULLUP);
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break;
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case IRQ_TYPE_LEVEL_LOW:
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ljca_gpio->connect_mode[gpio_id] |= (LJCA_GPIO_CONF_LEVEL | LJCA_GPIO_CONF_PULLDOWN);
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break;
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case IRQ_TYPE_EDGE_BOTH:
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break;
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case IRQ_TYPE_EDGE_RISING:
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ljca_gpio->connect_mode[gpio_id] |= (LJCA_GPIO_CONF_EDGE | LJCA_GPIO_CONF_PULLUP);
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break;
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case IRQ_TYPE_EDGE_FALLING:
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ljca_gpio->connect_mode[gpio_id] |= (LJCA_GPIO_CONF_EDGE | LJCA_GPIO_CONF_PULLDOWN);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static void ljca_irq_bus_lock(struct irq_data *irqd)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
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struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
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mutex_lock(&ljca_gpio->irq_lock);
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}
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static void ljca_irq_bus_unlock(struct irq_data *irqd)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
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struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
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int gpio_id = irqd_to_hwirq(irqd);
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int enabled;
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int unmasked;
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enabled = test_bit(gpio_id, ljca_gpio->enabled_irqs);
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unmasked = test_bit(gpio_id, ljca_gpio->unmasked_irqs);
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if (enabled != unmasked) {
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if (unmasked) {
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gpio_config(ljca_gpio, gpio_id, 0);
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ljca_enable_irq(ljca_gpio, gpio_id, true);
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set_bit(gpio_id, ljca_gpio->enabled_irqs);
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} else {
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ljca_enable_irq(ljca_gpio, gpio_id, false);
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clear_bit(gpio_id, ljca_gpio->enabled_irqs);
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}
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}
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mutex_unlock(&ljca_gpio->irq_lock);
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}
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static const struct irq_chip ljca_gpio_irqchip = {
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.name = "ljca-irq",
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.irq_mask = ljca_irq_mask,
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.irq_unmask = ljca_irq_unmask,
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.irq_set_type = ljca_irq_set_type,
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.irq_bus_lock = ljca_irq_bus_lock,
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.irq_bus_sync_unlock = ljca_irq_bus_unlock,
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.flags = IRQCHIP_IMMUTABLE,
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GPIOCHIP_IRQ_RESOURCE_HELPERS,
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};
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static int ljca_gpio_probe(struct platform_device *pdev)
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{
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struct ljca_gpio_dev *ljca_gpio;
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struct gpio_irq_chip *girq;
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int ret;
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ljca_gpio = devm_kzalloc(&pdev->dev, sizeof(*ljca_gpio), GFP_KERNEL);
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if (!ljca_gpio)
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return -ENOMEM;
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ljca_gpio->gpio_info = dev_get_platdata(&pdev->dev);
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ljca_gpio->connect_mode = devm_kcalloc(&pdev->dev, ljca_gpio->gpio_info->num,
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sizeof(*ljca_gpio->connect_mode), GFP_KERNEL);
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if (!ljca_gpio->connect_mode)
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return -ENOMEM;
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mutex_init(&ljca_gpio->irq_lock);
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mutex_init(&ljca_gpio->trans_lock);
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ljca_gpio->pdev = pdev;
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ljca_gpio->gc.direction_input = ljca_gpio_direction_input;
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ljca_gpio->gc.direction_output = ljca_gpio_direction_output;
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ljca_gpio->gc.get = ljca_gpio_get_value;
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ljca_gpio->gc.set = ljca_gpio_set_value;
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ljca_gpio->gc.set_config = ljca_gpio_set_config;
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ljca_gpio->gc.init_valid_mask = ljca_gpio_init_valid_mask;
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ljca_gpio->gc.can_sleep = true;
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ljca_gpio->gc.parent = &pdev->dev;
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ljca_gpio->gc.base = -1;
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ljca_gpio->gc.ngpio = ljca_gpio->gpio_info->num;
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ljca_gpio->gc.label = ACPI_COMPANION(&pdev->dev) ?
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acpi_dev_name(ACPI_COMPANION(&pdev->dev)) :
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dev_name(&pdev->dev);
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ljca_gpio->gc.owner = THIS_MODULE;
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platform_set_drvdata(pdev, ljca_gpio);
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ljca_register_event_cb(ljca_gpio->gpio_info->ljca, ljca_gpio_event_cb, ljca_gpio);
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girq = &ljca_gpio->gc.irq;
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gpio_irq_chip_set_chip(girq, &ljca_gpio_irqchip);
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girq->parent_handler = NULL;
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girq->num_parents = 0;
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girq->parents = NULL;
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girq->default_type = IRQ_TYPE_NONE;
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girq->handler = handle_simple_irq;
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girq->init_valid_mask = ljca_gpio_irq_init_valid_mask;
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INIT_WORK(&ljca_gpio->work, ljca_gpio_async);
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ret = gpiochip_add_data(&ljca_gpio->gc, ljca_gpio);
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if (ret) {
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ljca_unregister_event_cb(ljca_gpio->gpio_info->ljca);
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mutex_destroy(&ljca_gpio->irq_lock);
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mutex_destroy(&ljca_gpio->trans_lock);
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}
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return ret;
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}
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static int ljca_gpio_remove(struct platform_device *pdev)
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{
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struct ljca_gpio_dev *ljca_gpio = platform_get_drvdata(pdev);
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gpiochip_remove(&ljca_gpio->gc);
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ljca_unregister_event_cb(ljca_gpio->gpio_info->ljca);
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mutex_destroy(&ljca_gpio->irq_lock);
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mutex_destroy(&ljca_gpio->trans_lock);
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return 0;
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}
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#define LJCA_GPIO_DRV_NAME "ljca-gpio"
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static const struct platform_device_id ljca_gpio_id[] = {
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{ LJCA_GPIO_DRV_NAME, 0 },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(platform, ljca_gpio_id);
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static struct platform_driver ljca_gpio_driver = {
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.driver.name = LJCA_GPIO_DRV_NAME,
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.probe = ljca_gpio_probe,
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.remove = ljca_gpio_remove,
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};
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module_platform_driver(ljca_gpio_driver);
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MODULE_AUTHOR("Ye Xiang <xiang.ye@intel.com>");
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MODULE_AUTHOR("Wang Zhifeng <zhifeng.wang@intel.com>");
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MODULE_AUTHOR("Zhang Lixu <lixu.zhang@intel.com>");
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MODULE_DESCRIPTION("Intel La Jolla Cove Adapter USB-GPIO driver");
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MODULE_LICENSE("GPL");
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MODULE_IMPORT_NS(LJCA);
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