678 lines
16 KiB
C
678 lines
16 KiB
C
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/*
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* Linux device driver for PCI based Prism54
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*
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* Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
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* Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
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*
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* Based on the islsm (softmac prism54) driver, which is:
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* Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/firmware.h>
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#include <linux/etherdevice.h>
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#include <linux/delay.h>
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#include <linux/completion.h>
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#include <net/mac80211.h>
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#include "p54.h"
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#include "lmac.h"
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#include "p54pci.h"
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MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
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MODULE_DESCRIPTION("Prism54 PCI wireless driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("prism54pci");
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MODULE_FIRMWARE("isl3886pci");
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static DEFINE_PCI_DEVICE_TABLE(p54p_table) = {
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/* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
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{ PCI_DEVICE(0x1260, 0x3890) },
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/* 3COM 3CRWE154G72 Wireless LAN adapter */
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{ PCI_DEVICE(0x10b7, 0x6001) },
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/* Intersil PRISM Indigo Wireless LAN adapter */
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{ PCI_DEVICE(0x1260, 0x3877) },
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/* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
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{ PCI_DEVICE(0x1260, 0x3886) },
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/* Intersil PRISM Xbow Wireless LAN adapter (Symbol AP-300) */
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{ PCI_DEVICE(0x1260, 0xffff) },
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{ },
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};
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MODULE_DEVICE_TABLE(pci, p54p_table);
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static int p54p_upload_firmware(struct ieee80211_hw *dev)
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{
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struct p54p_priv *priv = dev->priv;
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__le32 reg;
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int err;
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__le32 *data;
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u32 remains, left, device_addr;
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P54P_WRITE(int_enable, cpu_to_le32(0));
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P54P_READ(int_enable);
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udelay(10);
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reg = P54P_READ(ctrl_stat);
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reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
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reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
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P54P_WRITE(ctrl_stat, reg);
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P54P_READ(ctrl_stat);
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udelay(10);
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reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
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P54P_WRITE(ctrl_stat, reg);
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wmb();
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udelay(10);
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reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
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P54P_WRITE(ctrl_stat, reg);
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wmb();
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/* wait for the firmware to reset properly */
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mdelay(10);
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err = p54_parse_firmware(dev, priv->firmware);
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if (err)
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return err;
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if (priv->common.fw_interface != FW_LM86) {
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dev_err(&priv->pdev->dev, "wrong firmware, "
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"please get a LM86(PCI) firmware a try again.\n");
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return -EINVAL;
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}
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data = (__le32 *) priv->firmware->data;
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remains = priv->firmware->size;
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device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
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while (remains) {
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u32 i = 0;
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left = min((u32)0x1000, remains);
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P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
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P54P_READ(int_enable);
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device_addr += 0x1000;
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while (i < left) {
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P54P_WRITE(direct_mem_win[i], *data++);
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i += sizeof(u32);
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}
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remains -= left;
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P54P_READ(int_enable);
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}
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reg = P54P_READ(ctrl_stat);
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reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
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reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
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reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
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P54P_WRITE(ctrl_stat, reg);
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P54P_READ(ctrl_stat);
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udelay(10);
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reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
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P54P_WRITE(ctrl_stat, reg);
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wmb();
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udelay(10);
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reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
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P54P_WRITE(ctrl_stat, reg);
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wmb();
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udelay(10);
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/* wait for the firmware to boot properly */
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mdelay(100);
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return 0;
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}
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static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
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int ring_index, struct p54p_desc *ring, u32 ring_limit,
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struct sk_buff **rx_buf, u32 index)
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{
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struct p54p_priv *priv = dev->priv;
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struct p54p_ring_control *ring_control = priv->ring_control;
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u32 limit, idx, i;
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idx = le32_to_cpu(ring_control->host_idx[ring_index]);
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limit = idx;
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limit -= index;
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limit = ring_limit - limit;
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i = idx % ring_limit;
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while (limit-- > 1) {
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struct p54p_desc *desc = &ring[i];
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if (!desc->host_addr) {
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struct sk_buff *skb;
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dma_addr_t mapping;
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skb = dev_alloc_skb(priv->common.rx_mtu + 32);
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if (!skb)
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break;
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mapping = pci_map_single(priv->pdev,
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skb_tail_pointer(skb),
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priv->common.rx_mtu + 32,
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PCI_DMA_FROMDEVICE);
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if (pci_dma_mapping_error(priv->pdev, mapping)) {
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dev_kfree_skb_any(skb);
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dev_err(&priv->pdev->dev,
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"RX DMA Mapping error\n");
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break;
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}
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desc->host_addr = cpu_to_le32(mapping);
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desc->device_addr = 0; // FIXME: necessary?
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desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
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desc->flags = 0;
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rx_buf[i] = skb;
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}
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i++;
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idx++;
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i %= ring_limit;
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}
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wmb();
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ring_control->host_idx[ring_index] = cpu_to_le32(idx);
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}
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static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
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int ring_index, struct p54p_desc *ring, u32 ring_limit,
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struct sk_buff **rx_buf)
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{
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struct p54p_priv *priv = dev->priv;
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struct p54p_ring_control *ring_control = priv->ring_control;
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struct p54p_desc *desc;
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u32 idx, i;
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i = (*index) % ring_limit;
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(*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
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idx %= ring_limit;
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while (i != idx) {
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u16 len;
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struct sk_buff *skb;
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desc = &ring[i];
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len = le16_to_cpu(desc->len);
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skb = rx_buf[i];
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if (!skb) {
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i++;
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i %= ring_limit;
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continue;
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}
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if (unlikely(len > priv->common.rx_mtu)) {
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if (net_ratelimit())
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dev_err(&priv->pdev->dev, "rx'd frame size "
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"exceeds length threshold.\n");
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len = priv->common.rx_mtu;
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}
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skb_put(skb, len);
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if (p54_rx(dev, skb)) {
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pci_unmap_single(priv->pdev,
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le32_to_cpu(desc->host_addr),
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priv->common.rx_mtu + 32,
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PCI_DMA_FROMDEVICE);
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rx_buf[i] = NULL;
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desc->host_addr = 0;
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} else {
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skb_trim(skb, 0);
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desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
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}
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i++;
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i %= ring_limit;
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}
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p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf, *index);
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}
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static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
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int ring_index, struct p54p_desc *ring, u32 ring_limit,
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struct sk_buff **tx_buf)
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{
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struct p54p_priv *priv = dev->priv;
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struct p54p_ring_control *ring_control = priv->ring_control;
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struct p54p_desc *desc;
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struct sk_buff *skb;
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u32 idx, i;
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i = (*index) % ring_limit;
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(*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
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idx %= ring_limit;
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while (i != idx) {
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desc = &ring[i];
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skb = tx_buf[i];
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tx_buf[i] = NULL;
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pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
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le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
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desc->host_addr = 0;
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desc->device_addr = 0;
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desc->len = 0;
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desc->flags = 0;
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if (skb && FREE_AFTER_TX(skb))
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p54_free_skb(dev, skb);
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i++;
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i %= ring_limit;
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}
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}
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static void p54p_tasklet(unsigned long dev_id)
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{
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struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
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struct p54p_priv *priv = dev->priv;
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struct p54p_ring_control *ring_control = priv->ring_control;
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p54p_check_tx_ring(dev, &priv->tx_idx_mgmt, 3, ring_control->tx_mgmt,
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ARRAY_SIZE(ring_control->tx_mgmt),
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priv->tx_buf_mgmt);
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p54p_check_tx_ring(dev, &priv->tx_idx_data, 1, ring_control->tx_data,
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ARRAY_SIZE(ring_control->tx_data),
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priv->tx_buf_data);
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p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
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ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
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p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
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ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
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wmb();
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
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}
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static irqreturn_t p54p_interrupt(int irq, void *dev_id)
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{
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struct ieee80211_hw *dev = dev_id;
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struct p54p_priv *priv = dev->priv;
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__le32 reg;
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reg = P54P_READ(int_ident);
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if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
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goto out;
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}
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P54P_WRITE(int_ack, reg);
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reg &= P54P_READ(int_enable);
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if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE))
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tasklet_schedule(&priv->tasklet);
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else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
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complete(&priv->boot_comp);
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out:
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return reg ? IRQ_HANDLED : IRQ_NONE;
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}
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static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
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{
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unsigned long flags;
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struct p54p_priv *priv = dev->priv;
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struct p54p_ring_control *ring_control = priv->ring_control;
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struct p54p_desc *desc;
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dma_addr_t mapping;
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u32 device_idx, idx, i;
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spin_lock_irqsave(&priv->lock, flags);
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device_idx = le32_to_cpu(ring_control->device_idx[1]);
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idx = le32_to_cpu(ring_control->host_idx[1]);
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i = idx % ARRAY_SIZE(ring_control->tx_data);
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mapping = pci_map_single(priv->pdev, skb->data, skb->len,
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PCI_DMA_TODEVICE);
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if (pci_dma_mapping_error(priv->pdev, mapping)) {
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spin_unlock_irqrestore(&priv->lock, flags);
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p54_free_skb(dev, skb);
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dev_err(&priv->pdev->dev, "TX DMA mapping error\n");
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return ;
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}
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priv->tx_buf_data[i] = skb;
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desc = &ring_control->tx_data[i];
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desc->host_addr = cpu_to_le32(mapping);
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desc->device_addr = ((struct p54_hdr *)skb->data)->req_id;
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desc->len = cpu_to_le16(skb->len);
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desc->flags = 0;
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wmb();
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ring_control->host_idx[1] = cpu_to_le32(idx + 1);
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spin_unlock_irqrestore(&priv->lock, flags);
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
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P54P_READ(dev_int);
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}
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static void p54p_stop(struct ieee80211_hw *dev)
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{
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struct p54p_priv *priv = dev->priv;
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struct p54p_ring_control *ring_control = priv->ring_control;
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unsigned int i;
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struct p54p_desc *desc;
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P54P_WRITE(int_enable, cpu_to_le32(0));
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P54P_READ(int_enable);
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udelay(10);
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free_irq(priv->pdev->irq, dev);
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tasklet_kill(&priv->tasklet);
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
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for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
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desc = &ring_control->rx_data[i];
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if (desc->host_addr)
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pci_unmap_single(priv->pdev,
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le32_to_cpu(desc->host_addr),
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priv->common.rx_mtu + 32,
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PCI_DMA_FROMDEVICE);
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kfree_skb(priv->rx_buf_data[i]);
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priv->rx_buf_data[i] = NULL;
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}
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for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
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desc = &ring_control->rx_mgmt[i];
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if (desc->host_addr)
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pci_unmap_single(priv->pdev,
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le32_to_cpu(desc->host_addr),
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priv->common.rx_mtu + 32,
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PCI_DMA_FROMDEVICE);
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kfree_skb(priv->rx_buf_mgmt[i]);
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priv->rx_buf_mgmt[i] = NULL;
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}
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for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
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desc = &ring_control->tx_data[i];
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if (desc->host_addr)
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pci_unmap_single(priv->pdev,
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le32_to_cpu(desc->host_addr),
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le16_to_cpu(desc->len),
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PCI_DMA_TODEVICE);
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p54_free_skb(dev, priv->tx_buf_data[i]);
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priv->tx_buf_data[i] = NULL;
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}
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for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
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desc = &ring_control->tx_mgmt[i];
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if (desc->host_addr)
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pci_unmap_single(priv->pdev,
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le32_to_cpu(desc->host_addr),
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le16_to_cpu(desc->len),
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PCI_DMA_TODEVICE);
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p54_free_skb(dev, priv->tx_buf_mgmt[i]);
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priv->tx_buf_mgmt[i] = NULL;
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}
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memset(ring_control, 0, sizeof(*ring_control));
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}
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static int p54p_open(struct ieee80211_hw *dev)
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{
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struct p54p_priv *priv = dev->priv;
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int err;
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init_completion(&priv->boot_comp);
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err = request_irq(priv->pdev->irq, p54p_interrupt,
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IRQF_SHARED, "p54pci", dev);
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if (err) {
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dev_err(&priv->pdev->dev, "failed to register IRQ handler\n");
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return err;
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}
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memset(priv->ring_control, 0, sizeof(*priv->ring_control));
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err = p54p_upload_firmware(dev);
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if (err) {
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free_irq(priv->pdev->irq, dev);
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return err;
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}
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priv->rx_idx_data = priv->tx_idx_data = 0;
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priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
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p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
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ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data, 0);
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p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
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ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt, 0);
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P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
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P54P_READ(ring_control_base);
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wmb();
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udelay(10);
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P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
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P54P_READ(int_enable);
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wmb();
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udelay(10);
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
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P54P_READ(dev_int);
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if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
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wiphy_err(dev->wiphy, "Cannot boot firmware!\n");
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p54p_stop(dev);
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return -ETIMEDOUT;
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}
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P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
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P54P_READ(int_enable);
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wmb();
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udelay(10);
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
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P54P_READ(dev_int);
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wmb();
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udelay(10);
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return 0;
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}
|
|
|
|
static int __devinit p54p_probe(struct pci_dev *pdev,
|
|
const struct pci_device_id *id)
|
|
{
|
|
struct p54p_priv *priv;
|
|
struct ieee80211_hw *dev;
|
|
unsigned long mem_addr, mem_len;
|
|
int err;
|
|
|
|
err = pci_enable_device(pdev);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Cannot enable new PCI device\n");
|
|
return err;
|
|
}
|
|
|
|
mem_addr = pci_resource_start(pdev, 0);
|
|
mem_len = pci_resource_len(pdev, 0);
|
|
if (mem_len < sizeof(struct p54p_csr)) {
|
|
dev_err(&pdev->dev, "Too short PCI resources\n");
|
|
goto err_disable_dev;
|
|
}
|
|
|
|
err = pci_request_regions(pdev, "p54pci");
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Cannot obtain PCI resources\n");
|
|
goto err_disable_dev;
|
|
}
|
|
|
|
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) ||
|
|
pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
|
|
dev_err(&pdev->dev, "No suitable DMA available\n");
|
|
goto err_free_reg;
|
|
}
|
|
|
|
pci_set_master(pdev);
|
|
pci_try_set_mwi(pdev);
|
|
|
|
pci_write_config_byte(pdev, 0x40, 0);
|
|
pci_write_config_byte(pdev, 0x41, 0);
|
|
|
|
dev = p54_init_common(sizeof(*priv));
|
|
if (!dev) {
|
|
dev_err(&pdev->dev, "ieee80211 alloc failed\n");
|
|
err = -ENOMEM;
|
|
goto err_free_reg;
|
|
}
|
|
|
|
priv = dev->priv;
|
|
priv->pdev = pdev;
|
|
|
|
SET_IEEE80211_DEV(dev, &pdev->dev);
|
|
pci_set_drvdata(pdev, dev);
|
|
|
|
priv->map = ioremap(mem_addr, mem_len);
|
|
if (!priv->map) {
|
|
dev_err(&pdev->dev, "Cannot map device memory\n");
|
|
err = -ENOMEM;
|
|
goto err_free_dev;
|
|
}
|
|
|
|
priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
|
|
&priv->ring_control_dma);
|
|
if (!priv->ring_control) {
|
|
dev_err(&pdev->dev, "Cannot allocate rings\n");
|
|
err = -ENOMEM;
|
|
goto err_iounmap;
|
|
}
|
|
priv->common.open = p54p_open;
|
|
priv->common.stop = p54p_stop;
|
|
priv->common.tx = p54p_tx;
|
|
|
|
spin_lock_init(&priv->lock);
|
|
tasklet_init(&priv->tasklet, p54p_tasklet, (unsigned long)dev);
|
|
|
|
err = request_firmware(&priv->firmware, "isl3886pci",
|
|
&priv->pdev->dev);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Cannot find firmware (isl3886pci)\n");
|
|
err = request_firmware(&priv->firmware, "isl3886",
|
|
&priv->pdev->dev);
|
|
if (err)
|
|
goto err_free_common;
|
|
}
|
|
|
|
err = p54p_open(dev);
|
|
if (err)
|
|
goto err_free_common;
|
|
err = p54_read_eeprom(dev);
|
|
p54p_stop(dev);
|
|
if (err)
|
|
goto err_free_common;
|
|
|
|
err = p54_register_common(dev, &pdev->dev);
|
|
if (err)
|
|
goto err_free_common;
|
|
|
|
return 0;
|
|
|
|
err_free_common:
|
|
release_firmware(priv->firmware);
|
|
pci_free_consistent(pdev, sizeof(*priv->ring_control),
|
|
priv->ring_control, priv->ring_control_dma);
|
|
|
|
err_iounmap:
|
|
iounmap(priv->map);
|
|
|
|
err_free_dev:
|
|
pci_set_drvdata(pdev, NULL);
|
|
p54_free_common(dev);
|
|
|
|
err_free_reg:
|
|
pci_release_regions(pdev);
|
|
err_disable_dev:
|
|
pci_disable_device(pdev);
|
|
return err;
|
|
}
|
|
|
|
static void __devexit p54p_remove(struct pci_dev *pdev)
|
|
{
|
|
struct ieee80211_hw *dev = pci_get_drvdata(pdev);
|
|
struct p54p_priv *priv;
|
|
|
|
if (!dev)
|
|
return;
|
|
|
|
p54_unregister_common(dev);
|
|
priv = dev->priv;
|
|
release_firmware(priv->firmware);
|
|
pci_free_consistent(pdev, sizeof(*priv->ring_control),
|
|
priv->ring_control, priv->ring_control_dma);
|
|
iounmap(priv->map);
|
|
pci_release_regions(pdev);
|
|
pci_disable_device(pdev);
|
|
p54_free_common(dev);
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
|
|
{
|
|
struct ieee80211_hw *dev = pci_get_drvdata(pdev);
|
|
struct p54p_priv *priv = dev->priv;
|
|
|
|
if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
|
|
ieee80211_stop_queues(dev);
|
|
p54p_stop(dev);
|
|
}
|
|
|
|
pci_save_state(pdev);
|
|
pci_set_power_state(pdev, pci_choose_state(pdev, state));
|
|
return 0;
|
|
}
|
|
|
|
static int p54p_resume(struct pci_dev *pdev)
|
|
{
|
|
struct ieee80211_hw *dev = pci_get_drvdata(pdev);
|
|
struct p54p_priv *priv = dev->priv;
|
|
|
|
pci_set_power_state(pdev, PCI_D0);
|
|
pci_restore_state(pdev);
|
|
|
|
if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
|
|
p54p_open(dev);
|
|
ieee80211_wake_queues(dev);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_PM */
|
|
|
|
static struct pci_driver p54p_driver = {
|
|
.name = "p54pci",
|
|
.id_table = p54p_table,
|
|
.probe = p54p_probe,
|
|
.remove = __devexit_p(p54p_remove),
|
|
#ifdef CONFIG_PM
|
|
.suspend = p54p_suspend,
|
|
.resume = p54p_resume,
|
|
#endif /* CONFIG_PM */
|
|
};
|
|
|
|
static int __init p54p_init(void)
|
|
{
|
|
return pci_register_driver(&p54p_driver);
|
|
}
|
|
|
|
static void __exit p54p_exit(void)
|
|
{
|
|
pci_unregister_driver(&p54p_driver);
|
|
}
|
|
|
|
module_init(p54p_init);
|
|
module_exit(p54p_exit);
|