382 lines
8.8 KiB
C
382 lines
8.8 KiB
C
/*
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* BRIEF MODULE DESCRIPTION
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* Hardware definitions for the Au1100 LCD controller
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*
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* Copyright 2002 MontaVista Software
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* Copyright 2002 Alchemy Semiconductor
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* Author: Alchemy Semiconductor, MontaVista Software
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef _AU1100LCD_H
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#define _AU1100LCD_H
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/********************************************************************/
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#define uint32 unsigned long
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typedef volatile struct
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{
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uint32 lcd_control;
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uint32 lcd_intstatus;
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uint32 lcd_intenable;
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uint32 lcd_horztiming;
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uint32 lcd_verttiming;
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uint32 lcd_clkcontrol;
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uint32 lcd_dmaaddr0;
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uint32 lcd_dmaaddr1;
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uint32 lcd_words;
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uint32 lcd_pwmdiv;
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uint32 lcd_pwmhi;
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uint32 reserved[(0x0400-0x002C)/4];
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uint32 lcd_pallettebase[256];
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} AU1100_LCD;
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/********************************************************************/
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#define AU1100_LCD_ADDR 0xB5000000
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/*
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* Register bit definitions
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*/
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/* lcd_control */
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#define LCD_CONTROL_SBPPF (7<<18)
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#define LCD_CONTROL_SBPPF_655 (0<<18)
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#define LCD_CONTROL_SBPPF_565 (1<<18)
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#define LCD_CONTROL_SBPPF_556 (2<<18)
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#define LCD_CONTROL_SBPPF_1555 (3<<18)
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#define LCD_CONTROL_SBPPF_5551 (4<<18)
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#define LCD_CONTROL_WP (1<<17)
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#define LCD_CONTROL_WD (1<<16)
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#define LCD_CONTROL_C (1<<15)
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#define LCD_CONTROL_SM (3<<13)
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#define LCD_CONTROL_SM_0 (0<<13)
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#define LCD_CONTROL_SM_90 (1<<13)
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#define LCD_CONTROL_SM_180 (2<<13)
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#define LCD_CONTROL_SM_270 (3<<13)
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#define LCD_CONTROL_DB (1<<12)
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#define LCD_CONTROL_CCO (1<<11)
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#define LCD_CONTROL_DP (1<<10)
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#define LCD_CONTROL_PO (3<<8)
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#define LCD_CONTROL_PO_00 (0<<8)
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#define LCD_CONTROL_PO_01 (1<<8)
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#define LCD_CONTROL_PO_10 (2<<8)
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#define LCD_CONTROL_PO_11 (3<<8)
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#define LCD_CONTROL_MPI (1<<7)
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#define LCD_CONTROL_PT (1<<6)
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#define LCD_CONTROL_PC (1<<5)
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#define LCD_CONTROL_BPP (7<<1)
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#define LCD_CONTROL_BPP_1 (0<<1)
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#define LCD_CONTROL_BPP_2 (1<<1)
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#define LCD_CONTROL_BPP_4 (2<<1)
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#define LCD_CONTROL_BPP_8 (3<<1)
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#define LCD_CONTROL_BPP_12 (4<<1)
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#define LCD_CONTROL_BPP_16 (5<<1)
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#define LCD_CONTROL_GO (1<<0)
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/* lcd_intstatus, lcd_intenable */
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#define LCD_INT_SD (1<<7)
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#define LCD_INT_OF (1<<6)
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#define LCD_INT_UF (1<<5)
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#define LCD_INT_SA (1<<3)
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#define LCD_INT_SS (1<<2)
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#define LCD_INT_S1 (1<<1)
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#define LCD_INT_S0 (1<<0)
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/* lcd_horztiming */
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#define LCD_HORZTIMING_HN2 (255<<24)
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#define LCD_HORZTIMING_HN2_N(N) (((N)-1)<<24)
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#define LCD_HORZTIMING_HN1 (255<<16)
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#define LCD_HORZTIMING_HN1_N(N) (((N)-1)<<16)
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#define LCD_HORZTIMING_HPW (63<<10)
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#define LCD_HORZTIMING_HPW_N(N) (((N)-1)<<10)
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#define LCD_HORZTIMING_PPL (1023<<0)
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#define LCD_HORZTIMING_PPL_N(N) (((N)-1)<<0)
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/* lcd_verttiming */
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#define LCD_VERTTIMING_VN2 (255<<24)
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#define LCD_VERTTIMING_VN2_N(N) (((N)-1)<<24)
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#define LCD_VERTTIMING_VN1 (255<<16)
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#define LCD_VERTTIMING_VN1_N(N) (((N)-1)<<16)
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#define LCD_VERTTIMING_VPW (63<<10)
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#define LCD_VERTTIMING_VPW_N(N) (((N)-1)<<10)
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#define LCD_VERTTIMING_LPP (1023<<0)
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#define LCD_VERTTIMING_LPP_N(N) (((N)-1)<<0)
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/* lcd_clkcontrol */
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#define LCD_CLKCONTROL_IB (1<<18)
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#define LCD_CLKCONTROL_IC (1<<17)
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#define LCD_CLKCONTROL_IH (1<<16)
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#define LCD_CLKCONTROL_IV (1<<15)
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#define LCD_CLKCONTROL_BF (31<<10)
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#define LCD_CLKCONTROL_BF_N(N) (((N)-1)<<10)
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#define LCD_CLKCONTROL_PCD (1023<<0)
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#define LCD_CLKCONTROL_PCD_N(N) ((N)<<0)
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/* lcd_pwmdiv */
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#define LCD_PWMDIV_EN (1<<12)
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#define LCD_PWMDIV_PWMDIV (2047<<0)
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#define LCD_PWMDIV_PWMDIV_N(N) (((N)-1)<<0)
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/* lcd_pwmhi */
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#define LCD_PWMHI_PWMHI1 (2047<<12)
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#define LCD_PWMHI_PWMHI1_N(N) ((N)<<12)
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#define LCD_PWMHI_PWMHI0 (2047<<0)
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#define LCD_PWMHI_PWMHI0_N(N) ((N)<<0)
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/* lcd_pallettebase - MONOCHROME */
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#define LCD_PALLETTE_MONO_MI (15<<0)
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#define LCD_PALLETTE_MONO_MI_N(N) ((N)<<0)
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/* lcd_pallettebase - COLOR */
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#define LCD_PALLETTE_COLOR_BI (15<<8)
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#define LCD_PALLETTE_COLOR_BI_N(N) ((N)<<8)
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#define LCD_PALLETTE_COLOR_GI (15<<4)
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#define LCD_PALLETTE_COLOR_GI_N(N) ((N)<<4)
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#define LCD_PALLETTE_COLOR_RI (15<<0)
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#define LCD_PALLETTE_COLOR_RI_N(N) ((N)<<0)
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/* lcd_palletebase - COLOR TFT PALLETIZED */
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#define LCD_PALLETTE_TFT_DC (65535<<0)
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#define LCD_PALLETTE_TFT_DC_N(N) ((N)<<0)
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/********************************************************************/
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struct known_lcd_panels
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{
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uint32 xres;
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uint32 yres;
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uint32 bpp;
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unsigned char panel_name[256];
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uint32 mode_control;
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uint32 mode_horztiming;
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uint32 mode_verttiming;
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uint32 mode_clkcontrol;
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uint32 mode_pwmdiv;
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uint32 mode_pwmhi;
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uint32 mode_toyclksrc;
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uint32 mode_backlight;
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};
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#if defined(__BIG_ENDIAN)
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#define LCD_DEFAULT_PIX_FORMAT LCD_CONTROL_PO_11
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#else
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#define LCD_DEFAULT_PIX_FORMAT LCD_CONTROL_PO_00
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#endif
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/*
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* The fb driver assumes that AUX PLL is at 48MHz. That can
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* cover up to 800x600 resolution; if you need higher resolution,
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* you should modify the driver as needed, not just this structure.
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*/
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struct known_lcd_panels panels[] =
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{
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{ /* 0: Pb1100 LCDA: Sharp 320x240 TFT panel */
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320, /* xres */
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240, /* yres */
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16, /* bpp */
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"Sharp_320x240_16",
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/* mode_control */
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( LCD_CONTROL_SBPPF_565
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/*LCD_CONTROL_WP*/
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/*LCD_CONTROL_WD*/
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| LCD_CONTROL_C
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| LCD_CONTROL_SM_0
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/*LCD_CONTROL_DB*/
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/*LCD_CONTROL_CCO*/
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/*LCD_CONTROL_DP*/
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| LCD_DEFAULT_PIX_FORMAT
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/*LCD_CONTROL_MPI*/
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| LCD_CONTROL_PT
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| LCD_CONTROL_PC
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| LCD_CONTROL_BPP_16 ),
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/* mode_horztiming */
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( LCD_HORZTIMING_HN2_N(8)
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| LCD_HORZTIMING_HN1_N(60)
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| LCD_HORZTIMING_HPW_N(12)
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| LCD_HORZTIMING_PPL_N(320) ),
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/* mode_verttiming */
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( LCD_VERTTIMING_VN2_N(5)
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| LCD_VERTTIMING_VN1_N(17)
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| LCD_VERTTIMING_VPW_N(1)
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| LCD_VERTTIMING_LPP_N(240) ),
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/* mode_clkcontrol */
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( 0
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/*LCD_CLKCONTROL_IB*/
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/*LCD_CLKCONTROL_IC*/
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/*LCD_CLKCONTROL_IH*/
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/*LCD_CLKCONTROL_IV*/
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| LCD_CLKCONTROL_PCD_N(1) ),
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/* mode_pwmdiv */
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0,
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/* mode_pwmhi */
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0,
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/* mode_toyclksrc */
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((1<<7) | (1<<6) | (1<<5)),
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/* mode_backlight */
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6
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},
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{ /* 1: Pb1100 LCDC 640x480 TFT panel */
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640, /* xres */
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480, /* yres */
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16, /* bpp */
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"Generic_640x480_16",
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/* mode_control */
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0x004806a | LCD_DEFAULT_PIX_FORMAT,
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/* mode_horztiming */
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0x3434d67f,
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/* mode_verttiming */
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0x0e0e39df,
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/* mode_clkcontrol */
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( 0
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/*LCD_CLKCONTROL_IB*/
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/*LCD_CLKCONTROL_IC*/
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/*LCD_CLKCONTROL_IH*/
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/*LCD_CLKCONTROL_IV*/
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| LCD_CLKCONTROL_PCD_N(1) ),
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/* mode_pwmdiv */
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0,
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/* mode_pwmhi */
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0,
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/* mode_toyclksrc */
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((1<<7) | (1<<6) | (0<<5)),
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/* mode_backlight */
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7
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},
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{ /* 2: Pb1100 LCDB 640x480 PrimeView TFT panel */
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640, /* xres */
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480, /* yres */
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16, /* bpp */
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"PrimeView_640x480_16",
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/* mode_control */
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0x0004886a | LCD_DEFAULT_PIX_FORMAT,
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/* mode_horztiming */
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0x0e4bfe7f,
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/* mode_verttiming */
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0x210805df,
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/* mode_clkcontrol */
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0x00038001,
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/* mode_pwmdiv */
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0,
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/* mode_pwmhi */
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0,
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/* mode_toyclksrc */
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((1<<7) | (1<<6) | (0<<5)),
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/* mode_backlight */
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7
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},
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{ /* 3: Pb1100 800x600x16bpp NEON CRT */
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800, /* xres */
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600, /* yres */
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16, /* bpp */
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"NEON_800x600_16",
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/* mode_control */
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0x0004886A | LCD_DEFAULT_PIX_FORMAT,
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/* mode_horztiming */
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0x005AFF1F,
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/* mode_verttiming */
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0x16000E57,
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/* mode_clkcontrol */
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0x00020000,
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/* mode_pwmdiv */
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0,
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/* mode_pwmhi */
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0,
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/* mode_toyclksrc */
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((1<<7) | (1<<6) | (0<<5)),
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/* mode_backlight */
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7
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},
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{ /* 4: Pb1100 640x480x16bpp NEON CRT */
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640, /* xres */
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480, /* yres */
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16, /* bpp */
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"NEON_640x480_16",
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/* mode_control */
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0x0004886A | LCD_DEFAULT_PIX_FORMAT,
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/* mode_horztiming */
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0x0052E27F,
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/* mode_verttiming */
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0x18000DDF,
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/* mode_clkcontrol */
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0x00020000,
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/* mode_pwmdiv */
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0,
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/* mode_pwmhi */
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0,
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/* mode_toyclksrc */
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((1<<7) | (1<<6) | (0<<5)),
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/* mode_backlight */
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7
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},
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};
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#endif /* _AU1100LCD_H */
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