54 lines
1.8 KiB
C
54 lines
1.8 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#ifndef __I915_FENCE_REG_H__
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#define __I915_FENCE_REG_H__
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#include <linux/list.h>
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struct drm_i915_private;
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struct i915_vma;
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#define I965_FENCE_PAGE 4096UL
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struct drm_i915_fence_reg {
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struct list_head link;
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struct drm_i915_private *i915;
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struct i915_vma *vma;
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int pin_count;
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int id;
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/**
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* Whether the tiling parameters for the currently
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* associated fence register have changed. Note that
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* for the purposes of tracking tiling changes we also
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* treat the unfenced register, the register slot that
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* the object occupies whilst it executes a fenced
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* command (such as BLT on gen2/3), as a "fence".
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*/
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bool dirty;
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};
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#endif
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