158 lines
3.6 KiB
C
158 lines
3.6 KiB
C
/*
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* Switch an MMU context.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2013 Tensilica Inc.
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*/
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#ifndef _XTENSA_MMU_CONTEXT_H
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#define _XTENSA_MMU_CONTEXT_H
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#ifndef CONFIG_MMU
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#include <asm/nommu_context.h>
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#else
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#include <linux/stringify.h>
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#include <linux/sched.h>
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#include <asm/vectors.h>
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#include <asm/pgtable.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm-generic/mm_hooks.h>
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#include <asm-generic/percpu.h>
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#if (XCHAL_HAVE_TLBS != 1)
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# error "Linux must have an MMU!"
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#endif
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DECLARE_PER_CPU(unsigned long, asid_cache);
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#define cpu_asid_cache(cpu) per_cpu(asid_cache, cpu)
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/*
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* NO_CONTEXT is the invalid ASID value that we don't ever assign to
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* any user or kernel context. We use the reserved values in the
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* ASID_INSERT macro below.
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*
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* 0 invalid
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* 1 kernel
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* 2 reserved
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* 3 reserved
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* 4...255 available
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*/
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#define NO_CONTEXT 0
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#define ASID_USER_FIRST 4
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#define ASID_MASK ((1 << XCHAL_MMU_ASID_BITS) - 1)
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#define ASID_INSERT(x) (0x03020001 | (((x) & ASID_MASK) << 8))
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void init_mmu(void);
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static inline void set_rasid_register (unsigned long val)
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{
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__asm__ __volatile__ (" wsr %0, rasid\n\t"
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" isync\n" : : "a" (val));
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}
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static inline unsigned long get_rasid_register (void)
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{
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unsigned long tmp;
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__asm__ __volatile__ (" rsr %0, rasid\n\t" : "=a" (tmp));
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return tmp;
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}
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static inline void get_new_mmu_context(struct mm_struct *mm, unsigned int cpu)
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{
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unsigned long asid = cpu_asid_cache(cpu);
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if ((++asid & ASID_MASK) == 0) {
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/*
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* Start new asid cycle; continue counting with next
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* incarnation bits; skipping over 0, 1, 2, 3.
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*/
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local_flush_tlb_all();
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asid += ASID_USER_FIRST;
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}
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cpu_asid_cache(cpu) = asid;
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mm->context.asid[cpu] = asid;
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mm->context.cpu = cpu;
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}
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static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu)
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{
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/*
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* Check if our ASID is of an older version and thus invalid.
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*/
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if (mm) {
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unsigned long asid = mm->context.asid[cpu];
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if (asid == NO_CONTEXT ||
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((asid ^ cpu_asid_cache(cpu)) & ~ASID_MASK))
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get_new_mmu_context(mm, cpu);
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}
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}
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static inline void activate_context(struct mm_struct *mm, unsigned int cpu)
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{
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get_mmu_context(mm, cpu);
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set_rasid_register(ASID_INSERT(mm->context.asid[cpu]));
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invalidate_page_directory();
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}
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/*
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* Initialize the context related info for a new mm_struct
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* instance. Valid cpu values are 0..(NR_CPUS-1), so initializing
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* to -1 says the process has never run on any core.
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*/
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static inline int init_new_context(struct task_struct *tsk,
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struct mm_struct *mm)
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{
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int cpu;
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for_each_possible_cpu(cpu) {
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mm->context.asid[cpu] = NO_CONTEXT;
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}
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mm->context.cpu = -1;
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return 0;
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}
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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unsigned int cpu = smp_processor_id();
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int migrated = next->context.cpu != cpu;
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/* Flush the icache if we migrated to a new core. */
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if (migrated) {
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__invalidate_icache_all();
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next->context.cpu = cpu;
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}
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if (migrated || prev != next)
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activate_context(next, cpu);
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}
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#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
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#define deactivate_mm(tsk, mm) do { } while (0)
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/*
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* Destroy context related info for an mm_struct that is about
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* to be put to rest.
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*/
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static inline void destroy_context(struct mm_struct *mm)
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{
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invalidate_page_directory();
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}
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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/* Nothing to do. */
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}
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#endif /* CONFIG_MMU */
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#endif /* _XTENSA_MMU_CONTEXT_H */
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