530 lines
13 KiB
C
530 lines
13 KiB
C
/*
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* Copyright (C) 2005 - 2011 Emulex
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation. The full GNU General
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* Public License is included in this distribution in the file called COPYING.
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*
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* Contact Information:
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* linux-drivers@emulex.com
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*
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* Emulex
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* 3333 Susan Street
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* Costa Mesa, CA 92626
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*/
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#ifndef BE_H
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#define BE_H
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#include <linux/pci.h>
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#include <linux/etherdevice.h>
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#include <linux/delay.h>
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#include <net/tcp.h>
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#include <net/ip.h>
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#include <net/ipv6.h>
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#include <linux/if_vlan.h>
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#include <linux/workqueue.h>
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#include <linux/interrupt.h>
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#include <linux/firmware.h>
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#include <linux/slab.h>
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#include <linux/u64_stats_sync.h>
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#include "be_hw.h"
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#define DRV_VER "4.0.100u"
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#define DRV_NAME "be2net"
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#define BE_NAME "ServerEngines BladeEngine2 10Gbps NIC"
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#define BE3_NAME "ServerEngines BladeEngine3 10Gbps NIC"
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#define OC_NAME "Emulex OneConnect 10Gbps NIC"
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#define OC_NAME_BE OC_NAME "(be3)"
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#define OC_NAME_LANCER OC_NAME "(Lancer)"
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#define DRV_DESC "ServerEngines BladeEngine 10Gbps NIC Driver"
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#define BE_VENDOR_ID 0x19a2
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#define EMULEX_VENDOR_ID 0x10df
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#define BE_DEVICE_ID1 0x211
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#define BE_DEVICE_ID2 0x221
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#define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */
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#define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */
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#define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */
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#define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */
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static inline char *nic_name(struct pci_dev *pdev)
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{
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switch (pdev->device) {
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case OC_DEVICE_ID1:
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return OC_NAME;
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case OC_DEVICE_ID2:
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return OC_NAME_BE;
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case OC_DEVICE_ID3:
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case OC_DEVICE_ID4:
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return OC_NAME_LANCER;
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case BE_DEVICE_ID2:
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return BE3_NAME;
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default:
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return BE_NAME;
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}
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}
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/* Number of bytes of an RX frame that are copied to skb->data */
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#define BE_HDR_LEN ((u16) 64)
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#define BE_MAX_JUMBO_FRAME_SIZE 9018
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#define BE_MIN_MTU 256
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#define BE_NUM_VLANS_SUPPORTED 64
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#define BE_MAX_EQD 96
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#define BE_MAX_TX_FRAG_COUNT 30
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#define EVNT_Q_LEN 1024
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#define TX_Q_LEN 2048
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#define TX_CQ_LEN 1024
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#define RX_Q_LEN 1024 /* Does not support any other value */
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#define RX_CQ_LEN 1024
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#define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
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#define MCC_CQ_LEN 256
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#define MAX_RSS_QS 4 /* BE limit is 4 queues/port */
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#define MAX_RX_QS (MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */
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#define MAX_TX_QS 8
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#define BE_MAX_MSIX_VECTORS (MAX_RX_QS + 1)/* RX + TX */
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#define BE_NAPI_WEIGHT 64
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#define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
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#define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
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#define FW_VER_LEN 32
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struct be_dma_mem {
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void *va;
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dma_addr_t dma;
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u32 size;
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};
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struct be_queue_info {
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struct be_dma_mem dma_mem;
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u16 len;
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u16 entry_size; /* Size of an element in the queue */
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u16 id;
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u16 tail, head;
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bool created;
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atomic_t used; /* Number of valid elements in the queue */
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};
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static inline u32 MODULO(u16 val, u16 limit)
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{
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BUG_ON(limit & (limit - 1));
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return val & (limit - 1);
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}
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static inline void index_adv(u16 *index, u16 val, u16 limit)
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{
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*index = MODULO((*index + val), limit);
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}
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static inline void index_inc(u16 *index, u16 limit)
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{
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*index = MODULO((*index + 1), limit);
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}
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static inline void *queue_head_node(struct be_queue_info *q)
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{
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return q->dma_mem.va + q->head * q->entry_size;
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}
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static inline void *queue_tail_node(struct be_queue_info *q)
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{
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return q->dma_mem.va + q->tail * q->entry_size;
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}
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static inline void queue_head_inc(struct be_queue_info *q)
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{
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index_inc(&q->head, q->len);
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}
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static inline void queue_tail_inc(struct be_queue_info *q)
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{
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index_inc(&q->tail, q->len);
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}
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struct be_eq_obj {
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struct be_queue_info q;
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char desc[32];
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/* Adaptive interrupt coalescing (AIC) info */
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bool enable_aic;
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u16 min_eqd; /* in usecs */
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u16 max_eqd; /* in usecs */
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u16 cur_eqd; /* in usecs */
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u8 eq_idx;
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struct napi_struct napi;
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};
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struct be_mcc_obj {
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struct be_queue_info q;
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struct be_queue_info cq;
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bool rearm_cq;
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};
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struct be_tx_stats {
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u64 tx_bytes;
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u64 tx_pkts;
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u64 tx_reqs;
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u64 tx_wrbs;
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u64 tx_compl;
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ulong tx_jiffies;
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u32 tx_stops;
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struct u64_stats_sync sync;
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struct u64_stats_sync sync_compl;
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};
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struct be_tx_obj {
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struct be_queue_info q;
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struct be_queue_info cq;
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/* Remember the skbs that were transmitted */
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struct sk_buff *sent_skb_list[TX_Q_LEN];
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struct be_tx_stats stats;
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};
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/* Struct to remember the pages posted for rx frags */
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struct be_rx_page_info {
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struct page *page;
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DEFINE_DMA_UNMAP_ADDR(bus);
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u16 page_offset;
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bool last_page_user;
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};
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struct be_rx_stats {
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u64 rx_bytes;
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u64 rx_pkts;
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u64 rx_pkts_prev;
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ulong rx_jiffies;
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u32 rx_drops_no_skbs; /* skb allocation errors */
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u32 rx_drops_no_frags; /* HW has no fetched frags */
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u32 rx_post_fail; /* page post alloc failures */
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u32 rx_polls; /* NAPI calls */
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u32 rx_events;
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u32 rx_compl;
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u32 rx_mcast_pkts;
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u32 rx_compl_err; /* completions with err set */
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u32 rx_pps; /* pkts per second */
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struct u64_stats_sync sync;
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};
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struct be_rx_compl_info {
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u32 rss_hash;
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u16 vlan_tag;
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u16 pkt_size;
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u16 rxq_idx;
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u16 port;
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u8 vlanf;
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u8 num_rcvd;
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u8 err;
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u8 ipf;
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u8 tcpf;
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u8 udpf;
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u8 ip_csum;
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u8 l4_csum;
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u8 ipv6;
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u8 vtm;
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u8 pkt_type;
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};
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struct be_rx_obj {
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struct be_adapter *adapter;
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struct be_queue_info q;
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struct be_queue_info cq;
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struct be_rx_compl_info rxcp;
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struct be_rx_page_info page_info_tbl[RX_Q_LEN];
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struct be_eq_obj rx_eq;
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struct be_rx_stats stats;
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u8 rss_id;
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bool rx_post_starved; /* Zero rx frags have been posted to BE */
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u32 cache_line_barrier[16];
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};
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struct be_drv_stats {
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u8 be_on_die_temperature;
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u32 tx_events;
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u32 eth_red_drops;
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u32 rx_drops_no_pbuf;
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u32 rx_drops_no_txpb;
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u32 rx_drops_no_erx_descr;
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u32 rx_drops_no_tpre_descr;
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u32 rx_drops_too_many_frags;
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u32 rx_drops_invalid_ring;
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u32 forwarded_packets;
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u32 rx_drops_mtu;
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u32 rx_crc_errors;
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u32 rx_alignment_symbol_errors;
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u32 rx_pause_frames;
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u32 rx_priority_pause_frames;
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u32 rx_control_frames;
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u32 rx_in_range_errors;
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u32 rx_out_range_errors;
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u32 rx_frame_too_long;
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u32 rx_address_match_errors;
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u32 rx_dropped_too_small;
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u32 rx_dropped_too_short;
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u32 rx_dropped_header_too_small;
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u32 rx_dropped_tcp_length;
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u32 rx_dropped_runt;
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u32 rx_ip_checksum_errs;
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u32 rx_tcp_checksum_errs;
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u32 rx_udp_checksum_errs;
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u32 tx_pauseframes;
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u32 tx_priority_pauseframes;
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u32 tx_controlframes;
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u32 rxpp_fifo_overflow_drop;
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u32 rx_input_fifo_overflow_drop;
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u32 pmem_fifo_overflow_drop;
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u32 jabber_events;
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};
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struct be_vf_cfg {
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unsigned char vf_mac_addr[ETH_ALEN];
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u32 vf_if_handle;
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u32 vf_pmac_id;
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u16 vf_vlan_tag;
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u32 vf_tx_rate;
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};
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#define BE_INVALID_PMAC_ID 0xffffffff
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struct be_adapter {
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struct pci_dev *pdev;
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struct net_device *netdev;
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u8 __iomem *csr;
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u8 __iomem *db; /* Door Bell */
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u8 __iomem *pcicfg; /* PCI config space */
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struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
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struct be_dma_mem mbox_mem;
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/* Mbox mem is adjusted to align to 16 bytes. The allocated addr
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* is stored for freeing purpose */
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struct be_dma_mem mbox_mem_alloced;
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struct be_mcc_obj mcc_obj;
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spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
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spinlock_t mcc_cq_lock;
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struct msix_entry msix_entries[BE_MAX_MSIX_VECTORS];
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u32 num_msix_vec;
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bool isr_registered;
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/* TX Rings */
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struct be_eq_obj tx_eq;
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struct be_tx_obj tx_obj[MAX_TX_QS];
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u8 num_tx_qs;
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u32 cache_line_break[8];
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/* Rx rings */
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struct be_rx_obj rx_obj[MAX_RX_QS];
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u32 num_rx_qs;
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u32 big_page_size; /* Compounded page size shared by rx wrbs */
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u8 eq_next_idx;
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struct be_drv_stats drv_stats;
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u16 vlans_added;
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u16 max_vlans; /* Number of vlans supported */
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u8 vlan_tag[VLAN_N_VID];
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u8 vlan_prio_bmap; /* Available Priority BitMap */
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u16 recommended_prio; /* Recommended Priority */
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struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
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struct be_dma_mem stats_cmd;
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/* Work queue used to perform periodic tasks like getting statistics */
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struct delayed_work work;
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u16 work_counter;
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/* Ethtool knobs and info */
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char fw_ver[FW_VER_LEN];
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u32 if_handle; /* Used to configure filtering */
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u32 pmac_id; /* MAC addr handle used by BE card */
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u32 beacon_state; /* for set_phys_id */
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bool eeh_err;
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bool link_up;
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u32 port_num;
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bool promiscuous;
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bool wol;
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u32 function_mode;
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u32 function_caps;
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u32 rx_fc; /* Rx flow control */
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u32 tx_fc; /* Tx flow control */
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bool ue_detected;
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bool stats_cmd_sent;
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int link_speed;
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u8 port_type;
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u8 transceiver;
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u8 autoneg;
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u8 generation; /* BladeEngine ASIC generation */
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u32 flash_status;
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struct completion flash_compl;
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bool be3_native;
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bool sriov_enabled;
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struct be_vf_cfg *vf_cfg;
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u8 is_virtfn;
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u32 sli_family;
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u8 hba_port_num;
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u16 pvid;
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};
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#define be_physfn(adapter) (!adapter->is_virtfn)
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/* BladeEngine Generation numbers */
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#define BE_GEN2 2
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#define BE_GEN3 3
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#define ON 1
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#define OFF 0
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#define lancer_chip(adapter) ((adapter->pdev->device == OC_DEVICE_ID3) || \
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(adapter->pdev->device == OC_DEVICE_ID4))
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extern const struct ethtool_ops be_ethtool_ops;
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#define msix_enabled(adapter) (adapter->num_msix_vec > 0)
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#define tx_stats(txo) (&txo->stats)
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#define rx_stats(rxo) (&rxo->stats)
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#define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops)
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#define for_all_rx_queues(adapter, rxo, i) \
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for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \
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i++, rxo++)
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/* Just skip the first default non-rss queue */
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#define for_all_rss_queues(adapter, rxo, i) \
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for (i = 0, rxo = &adapter->rx_obj[i+1]; i < (adapter->num_rx_qs - 1);\
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i++, rxo++)
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#define for_all_tx_queues(adapter, txo, i) \
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for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \
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i++, txo++)
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#define PAGE_SHIFT_4K 12
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#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
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/* Returns number of pages spanned by the data starting at the given addr */
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#define PAGES_4K_SPANNED(_address, size) \
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((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
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(size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
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/* Byte offset into the page corresponding to given address */
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#define OFFSET_IN_PAGE(addr) \
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((size_t)(addr) & (PAGE_SIZE_4K-1))
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/* Returns bit offset within a DWORD of a bitfield */
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#define AMAP_BIT_OFFSET(_struct, field) \
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(((size_t)&(((_struct *)0)->field))%32)
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/* Returns the bit mask of the field that is NOT shifted into location. */
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static inline u32 amap_mask(u32 bitsize)
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{
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return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
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}
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static inline void
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amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
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{
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u32 *dw = (u32 *) ptr + dw_offset;
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*dw &= ~(mask << offset);
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*dw |= (mask & value) << offset;
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}
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#define AMAP_SET_BITS(_struct, field, ptr, val) \
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amap_set(ptr, \
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offsetof(_struct, field)/32, \
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amap_mask(sizeof(((_struct *)0)->field)), \
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AMAP_BIT_OFFSET(_struct, field), \
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val)
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static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
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{
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u32 *dw = (u32 *) ptr;
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return mask & (*(dw + dw_offset) >> offset);
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}
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#define AMAP_GET_BITS(_struct, field, ptr) \
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amap_get(ptr, \
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offsetof(_struct, field)/32, \
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amap_mask(sizeof(((_struct *)0)->field)), \
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AMAP_BIT_OFFSET(_struct, field))
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#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
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#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
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static inline void swap_dws(void *wrb, int len)
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{
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#ifdef __BIG_ENDIAN
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u32 *dw = wrb;
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BUG_ON(len % 4);
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do {
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*dw = cpu_to_le32(*dw);
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dw++;
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len -= 4;
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} while (len);
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#endif /* __BIG_ENDIAN */
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}
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static inline u8 is_tcp_pkt(struct sk_buff *skb)
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{
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u8 val = 0;
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if (ip_hdr(skb)->version == 4)
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val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
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else if (ip_hdr(skb)->version == 6)
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val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
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return val;
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}
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static inline u8 is_udp_pkt(struct sk_buff *skb)
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{
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u8 val = 0;
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if (ip_hdr(skb)->version == 4)
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val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
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else if (ip_hdr(skb)->version == 6)
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val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
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return val;
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}
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static inline void be_check_sriov_fn_type(struct be_adapter *adapter)
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{
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u32 sli_intf;
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pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
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|
adapter->is_virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
|
|
}
|
|
|
|
static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
|
|
{
|
|
u32 addr;
|
|
|
|
addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
|
|
|
|
mac[5] = (u8)(addr & 0xFF);
|
|
mac[4] = (u8)((addr >> 8) & 0xFF);
|
|
mac[3] = (u8)((addr >> 16) & 0xFF);
|
|
/* Use the OUI from the current MAC address */
|
|
memcpy(mac, adapter->netdev->dev_addr, 3);
|
|
}
|
|
|
|
static inline bool be_multi_rxq(const struct be_adapter *adapter)
|
|
{
|
|
return adapter->num_rx_qs > 1;
|
|
}
|
|
|
|
extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
|
|
u16 num_popped);
|
|
extern void be_link_status_update(struct be_adapter *adapter, u32 link_status);
|
|
extern void be_parse_stats(struct be_adapter *adapter);
|
|
extern int be_load_fw(struct be_adapter *adapter, u8 *func);
|
|
#endif /* BE_H */
|