140 lines
3.6 KiB
C
140 lines
3.6 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
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/*
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* Copyright (c) 2018 Mellanox Technologies. All rights reserved.
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*/
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#ifndef _MLX5_ESWITCH_
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#define _MLX5_ESWITCH_
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#include <linux/mlx5/driver.h>
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#include <net/devlink.h>
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#define MLX5_ESWITCH_MANAGER(mdev) MLX5_CAP_GEN(mdev, eswitch_manager)
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enum {
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MLX5_ESWITCH_NONE,
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MLX5_ESWITCH_LEGACY,
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MLX5_ESWITCH_OFFLOADS
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};
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enum {
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REP_ETH,
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REP_IB,
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NUM_REP_TYPES,
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};
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enum {
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REP_UNREGISTERED,
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REP_REGISTERED,
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REP_LOADED,
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};
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struct mlx5_eswitch_rep;
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struct mlx5_eswitch_rep_ops {
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int (*load)(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep);
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void (*unload)(struct mlx5_eswitch_rep *rep);
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void *(*get_proto_dev)(struct mlx5_eswitch_rep *rep);
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};
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struct mlx5_eswitch_rep_data {
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void *priv;
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atomic_t state;
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};
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struct mlx5_eswitch_rep {
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struct mlx5_eswitch_rep_data rep_data[NUM_REP_TYPES];
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u16 vport;
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u16 vlan;
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/* Only IB rep is using vport_index */
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u16 vport_index;
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u32 vlan_refcount;
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};
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void mlx5_eswitch_register_vport_reps(struct mlx5_eswitch *esw,
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const struct mlx5_eswitch_rep_ops *ops,
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u8 rep_type);
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void mlx5_eswitch_unregister_vport_reps(struct mlx5_eswitch *esw, u8 rep_type);
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void *mlx5_eswitch_get_proto_dev(struct mlx5_eswitch *esw,
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u16 vport_num,
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u8 rep_type);
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struct mlx5_eswitch_rep *mlx5_eswitch_vport_rep(struct mlx5_eswitch *esw,
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u16 vport_num);
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void *mlx5_eswitch_uplink_get_proto_dev(struct mlx5_eswitch *esw, u8 rep_type);
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struct mlx5_flow_handle *
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mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *esw,
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u16 vport_num, u32 sqn);
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u16 mlx5_eswitch_get_total_vports(const struct mlx5_core_dev *dev);
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#ifdef CONFIG_MLX5_ESWITCH
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enum devlink_eswitch_encap_mode
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mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev);
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bool mlx5_eswitch_reg_c1_loopback_enabled(const struct mlx5_eswitch *esw);
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bool mlx5_eswitch_vport_match_metadata_enabled(const struct mlx5_eswitch *esw);
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/* Reg C0 usage:
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* Reg C0 = < ESW_PFNUM_BITS(4) | ESW_VPORT BITS(12) | ESW_CHAIN_TAG(16) >
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*
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* Highest 4 bits of the reg c0 is the PF_NUM (range 0-15), 12 bits of
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* unique non-zero vport id (range 1-4095). The rest (lowest 16 bits) is left
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* for tc chain tag restoration.
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* PFNUM + VPORT comprise the SOURCE_PORT matching.
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*/
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#define ESW_VPORT_BITS 12
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#define ESW_PFNUM_BITS 4
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#define ESW_SOURCE_PORT_METADATA_BITS (ESW_PFNUM_BITS + ESW_VPORT_BITS)
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#define ESW_SOURCE_PORT_METADATA_OFFSET (32 - ESW_SOURCE_PORT_METADATA_BITS)
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#define ESW_CHAIN_TAG_METADATA_BITS (32 - ESW_SOURCE_PORT_METADATA_BITS)
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#define ESW_CHAIN_TAG_METADATA_MASK GENMASK(ESW_CHAIN_TAG_METADATA_BITS - 1,\
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0)
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static inline u32 mlx5_eswitch_get_vport_metadata_mask(void)
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{
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return GENMASK(31, 32 - ESW_SOURCE_PORT_METADATA_BITS);
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}
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u32 mlx5_eswitch_get_vport_metadata_for_match(struct mlx5_eswitch *esw,
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u16 vport_num);
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u8 mlx5_eswitch_mode(struct mlx5_eswitch *esw);
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#else /* CONFIG_MLX5_ESWITCH */
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static inline u8 mlx5_eswitch_mode(struct mlx5_eswitch *esw)
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{
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return MLX5_ESWITCH_NONE;
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}
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static inline enum devlink_eswitch_encap_mode
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mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev)
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{
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return DEVLINK_ESWITCH_ENCAP_MODE_NONE;
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}
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static inline bool
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mlx5_eswitch_reg_c1_loopback_enabled(const struct mlx5_eswitch *esw)
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{
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return false;
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};
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static inline bool
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mlx5_eswitch_vport_match_metadata_enabled(const struct mlx5_eswitch *esw)
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{
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return false;
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};
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static inline u32
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mlx5_eswitch_get_vport_metadata_for_match(struct mlx5_eswitch *esw,
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int vport_num)
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{
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return 0;
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};
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static inline u32
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mlx5_eswitch_get_vport_metadata_mask(void)
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{
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return 0;
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}
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#endif /* CONFIG_MLX5_ESWITCH */
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#endif
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