142 lines
3.9 KiB
C
142 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel 8255 Programmable Peripheral Interface
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* Copyright (C) 2022 William Breathitt Gray
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*/
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#include <linux/bits.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/export.h>
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#include <linux/gpio/regmap.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include "gpio-i8255.h"
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#define I8255_NGPIO 24
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#define I8255_NGPIO_PER_REG 8
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#define I8255_CONTROL_PORTC_LOWER_DIRECTION BIT(0)
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#define I8255_CONTROL_PORTB_DIRECTION BIT(1)
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#define I8255_CONTROL_PORTC_UPPER_DIRECTION BIT(3)
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#define I8255_CONTROL_PORTA_DIRECTION BIT(4)
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#define I8255_CONTROL_MODE_SET BIT(7)
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#define I8255_PORTA 0x0
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#define I8255_PORTB 0x1
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#define I8255_PORTC 0x2
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#define I8255_CONTROL 0x3
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#define I8255_REG_DAT_BASE I8255_PORTA
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#define I8255_REG_DIR_IN_BASE I8255_CONTROL
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static int i8255_direction_mask(const unsigned int offset)
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{
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const unsigned int stride = offset / I8255_NGPIO_PER_REG;
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const unsigned int line = offset % I8255_NGPIO_PER_REG;
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switch (stride) {
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case I8255_PORTA:
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return I8255_CONTROL_PORTA_DIRECTION;
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case I8255_PORTB:
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return I8255_CONTROL_PORTB_DIRECTION;
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case I8255_PORTC:
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/* Port C can be configured by nibble */
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if (line >= 4)
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return I8255_CONTROL_PORTC_UPPER_DIRECTION;
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return I8255_CONTROL_PORTC_LOWER_DIRECTION;
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default:
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/* Should never reach this path */
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return 0;
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}
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}
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static int i8255_ppi_init(struct regmap *const map, const unsigned int base)
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{
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int err;
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/* Configure all ports to MODE 0 output mode */
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err = regmap_write(map, base + I8255_CONTROL, I8255_CONTROL_MODE_SET);
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if (err)
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return err;
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/* Initialize all GPIO to output 0 */
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err = regmap_write(map, base + I8255_PORTA, 0x00);
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if (err)
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return err;
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err = regmap_write(map, base + I8255_PORTB, 0x00);
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if (err)
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return err;
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return regmap_write(map, base + I8255_PORTC, 0x00);
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}
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static int i8255_reg_mask_xlate(struct gpio_regmap *gpio, unsigned int base,
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unsigned int offset, unsigned int *reg,
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unsigned int *mask)
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{
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const unsigned int ppi = offset / I8255_NGPIO;
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const unsigned int ppi_offset = offset % I8255_NGPIO;
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const unsigned int stride = ppi_offset / I8255_NGPIO_PER_REG;
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const unsigned int line = ppi_offset % I8255_NGPIO_PER_REG;
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switch (base) {
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case I8255_REG_DAT_BASE:
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*reg = base + stride + ppi * 4;
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*mask = BIT(line);
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return 0;
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case I8255_REG_DIR_IN_BASE:
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*reg = base + ppi * 4;
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*mask = i8255_direction_mask(ppi_offset);
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return 0;
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default:
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/* Should never reach this path */
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return -EINVAL;
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}
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}
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/**
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* devm_i8255_regmap_register - Register an i8255 GPIO controller
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* @dev: device that is registering this i8255 GPIO device
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* @config: configuration for i8255_regmap_config
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*
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* Registers an Intel 8255 Programmable Peripheral Interface GPIO controller.
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* Returns 0 on success and negative error number on failure.
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*/
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int devm_i8255_regmap_register(struct device *const dev,
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const struct i8255_regmap_config *const config)
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{
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struct gpio_regmap_config gpio_config = {0};
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unsigned long i;
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int err;
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if (!config->parent)
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return -EINVAL;
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if (!config->map)
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return -EINVAL;
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if (!config->num_ppi)
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return -EINVAL;
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for (i = 0; i < config->num_ppi; i++) {
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err = i8255_ppi_init(config->map, i * 4);
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if (err)
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return err;
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}
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gpio_config.parent = config->parent;
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gpio_config.regmap = config->map;
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gpio_config.ngpio = I8255_NGPIO * config->num_ppi;
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gpio_config.names = config->names;
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gpio_config.reg_dat_base = GPIO_REGMAP_ADDR(I8255_REG_DAT_BASE);
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gpio_config.reg_set_base = GPIO_REGMAP_ADDR(I8255_REG_DAT_BASE);
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gpio_config.reg_dir_in_base = GPIO_REGMAP_ADDR(I8255_REG_DIR_IN_BASE);
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gpio_config.ngpio_per_reg = I8255_NGPIO_PER_REG;
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gpio_config.irq_domain = config->domain;
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gpio_config.reg_mask_xlate = i8255_reg_mask_xlate;
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return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config));
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}
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EXPORT_SYMBOL_NS_GPL(devm_i8255_regmap_register, I8255);
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MODULE_AUTHOR("William Breathitt Gray");
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MODULE_DESCRIPTION("Intel 8255 Programmable Peripheral Interface");
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MODULE_LICENSE("GPL");
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