850 lines
21 KiB
C
850 lines
21 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
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*
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* Description: CoreSight Embedded Trace Buffer driver
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*/
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#include <linux/atomic.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#include <linux/uaccess.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/pm_runtime.h>
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#include <linux/seq_file.h>
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#include <linux/coresight.h>
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#include <linux/amba/bus.h>
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#include <linux/clk.h>
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#include <linux/circ_buf.h>
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#include <linux/mm.h>
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#include <linux/perf_event.h>
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#include "coresight-priv.h"
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#include "coresight-etm-perf.h"
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#define ETB_RAM_DEPTH_REG 0x004
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#define ETB_STATUS_REG 0x00c
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#define ETB_RAM_READ_DATA_REG 0x010
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#define ETB_RAM_READ_POINTER 0x014
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#define ETB_RAM_WRITE_POINTER 0x018
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#define ETB_TRG 0x01c
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#define ETB_CTL_REG 0x020
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#define ETB_RWD_REG 0x024
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#define ETB_FFSR 0x300
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#define ETB_FFCR 0x304
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#define ETB_ITMISCOP0 0xee0
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#define ETB_ITTRFLINACK 0xee4
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#define ETB_ITTRFLIN 0xee8
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#define ETB_ITATBDATA0 0xeeC
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#define ETB_ITATBCTR2 0xef0
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#define ETB_ITATBCTR1 0xef4
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#define ETB_ITATBCTR0 0xef8
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/* register description */
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/* STS - 0x00C */
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#define ETB_STATUS_RAM_FULL BIT(0)
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/* CTL - 0x020 */
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#define ETB_CTL_CAPT_EN BIT(0)
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/* FFCR - 0x304 */
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#define ETB_FFCR_EN_FTC BIT(0)
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#define ETB_FFCR_FON_MAN BIT(6)
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#define ETB_FFCR_STOP_FI BIT(12)
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#define ETB_FFCR_STOP_TRIGGER BIT(13)
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#define ETB_FFCR_BIT 6
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#define ETB_FFSR_BIT 1
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#define ETB_FRAME_SIZE_WORDS 4
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DEFINE_CORESIGHT_DEVLIST(etb_devs, "etb");
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/**
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* struct etb_drvdata - specifics associated to an ETB component
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* @base: memory mapped base address for this component.
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* @atclk: optional clock for the core parts of the ETB.
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* @csdev: component vitals needed by the framework.
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* @miscdev: specifics to handle "/dev/xyz.etb" entry.
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* @spinlock: only one at a time pls.
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* @reading: synchronise user space access to etb buffer.
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* @pid: Process ID of the process being monitored by the session
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* that is using this component.
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* @buf: area of memory where ETB buffer content gets sent.
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* @mode: this ETB is being used.
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* @buffer_depth: size of @buf.
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* @trigger_cntr: amount of words to store after a trigger.
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*/
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struct etb_drvdata {
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void __iomem *base;
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struct clk *atclk;
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struct coresight_device *csdev;
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struct miscdevice miscdev;
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spinlock_t spinlock;
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local_t reading;
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pid_t pid;
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u8 *buf;
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u32 mode;
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u32 buffer_depth;
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u32 trigger_cntr;
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};
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static int etb_set_buffer(struct coresight_device *csdev,
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struct perf_output_handle *handle);
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static inline unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata)
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{
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return readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG);
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}
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static void __etb_enable_hw(struct etb_drvdata *drvdata)
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{
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int i;
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u32 depth;
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CS_UNLOCK(drvdata->base);
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depth = drvdata->buffer_depth;
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/* reset write RAM pointer address */
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writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
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/* clear entire RAM buffer */
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for (i = 0; i < depth; i++)
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writel_relaxed(0x0, drvdata->base + ETB_RWD_REG);
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/* reset write RAM pointer address */
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writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
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/* reset read RAM pointer address */
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writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
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writel_relaxed(drvdata->trigger_cntr, drvdata->base + ETB_TRG);
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writel_relaxed(ETB_FFCR_EN_FTC | ETB_FFCR_STOP_TRIGGER,
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drvdata->base + ETB_FFCR);
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/* ETB trace capture enable */
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writel_relaxed(ETB_CTL_CAPT_EN, drvdata->base + ETB_CTL_REG);
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CS_LOCK(drvdata->base);
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}
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static int etb_enable_hw(struct etb_drvdata *drvdata)
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{
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int rc = coresight_claim_device(drvdata->base);
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if (rc)
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return rc;
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__etb_enable_hw(drvdata);
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return 0;
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}
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static int etb_enable_sysfs(struct coresight_device *csdev)
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{
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int ret = 0;
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unsigned long flags;
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struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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spin_lock_irqsave(&drvdata->spinlock, flags);
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/* Don't messup with perf sessions. */
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if (drvdata->mode == CS_MODE_PERF) {
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ret = -EBUSY;
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goto out;
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}
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if (drvdata->mode == CS_MODE_DISABLED) {
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ret = etb_enable_hw(drvdata);
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if (ret)
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goto out;
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drvdata->mode = CS_MODE_SYSFS;
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}
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atomic_inc(csdev->refcnt);
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out:
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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return ret;
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}
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static int etb_enable_perf(struct coresight_device *csdev, void *data)
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{
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int ret = 0;
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pid_t pid;
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unsigned long flags;
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struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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struct perf_output_handle *handle = data;
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spin_lock_irqsave(&drvdata->spinlock, flags);
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/* No need to continue if the component is already in used by sysFS. */
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if (drvdata->mode == CS_MODE_SYSFS) {
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ret = -EBUSY;
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goto out;
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}
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/* Get a handle on the pid of the process to monitor */
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pid = task_pid_nr(handle->event->owner);
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if (drvdata->pid != -1 && drvdata->pid != pid) {
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ret = -EBUSY;
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goto out;
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}
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/*
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* No HW configuration is needed if the sink is already in
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* use for this session.
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*/
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if (drvdata->pid == pid) {
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atomic_inc(csdev->refcnt);
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goto out;
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}
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/*
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* We don't have an internal state to clean up if we fail to setup
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* the perf buffer. So we can perform the step before we turn the
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* ETB on and leave without cleaning up.
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*/
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ret = etb_set_buffer(csdev, handle);
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if (ret)
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goto out;
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ret = etb_enable_hw(drvdata);
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if (!ret) {
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/* Associate with monitored process. */
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drvdata->pid = pid;
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drvdata->mode = CS_MODE_PERF;
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atomic_inc(csdev->refcnt);
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}
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out:
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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return ret;
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}
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static int etb_enable(struct coresight_device *csdev, u32 mode, void *data)
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{
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int ret;
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switch (mode) {
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case CS_MODE_SYSFS:
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ret = etb_enable_sysfs(csdev);
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break;
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case CS_MODE_PERF:
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ret = etb_enable_perf(csdev, data);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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if (ret)
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return ret;
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dev_dbg(&csdev->dev, "ETB enabled\n");
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return 0;
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}
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static void __etb_disable_hw(struct etb_drvdata *drvdata)
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{
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u32 ffcr;
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struct device *dev = &drvdata->csdev->dev;
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CS_UNLOCK(drvdata->base);
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ffcr = readl_relaxed(drvdata->base + ETB_FFCR);
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/* stop formatter when a stop has completed */
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ffcr |= ETB_FFCR_STOP_FI;
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writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
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/* manually generate a flush of the system */
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ffcr |= ETB_FFCR_FON_MAN;
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writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
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if (coresight_timeout(drvdata->base, ETB_FFCR, ETB_FFCR_BIT, 0)) {
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dev_err(dev,
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"timeout while waiting for completion of Manual Flush\n");
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}
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/* disable trace capture */
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writel_relaxed(0x0, drvdata->base + ETB_CTL_REG);
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if (coresight_timeout(drvdata->base, ETB_FFSR, ETB_FFSR_BIT, 1)) {
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dev_err(dev,
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"timeout while waiting for Formatter to Stop\n");
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}
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CS_LOCK(drvdata->base);
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}
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static void etb_dump_hw(struct etb_drvdata *drvdata)
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{
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bool lost = false;
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int i;
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u8 *buf_ptr;
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u32 read_data, depth;
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u32 read_ptr, write_ptr;
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u32 frame_off, frame_endoff;
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struct device *dev = &drvdata->csdev->dev;
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CS_UNLOCK(drvdata->base);
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read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
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write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
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frame_off = write_ptr % ETB_FRAME_SIZE_WORDS;
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frame_endoff = ETB_FRAME_SIZE_WORDS - frame_off;
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if (frame_off) {
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dev_err(dev,
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"write_ptr: %lu not aligned to formatter frame size\n",
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(unsigned long)write_ptr);
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dev_err(dev, "frameoff: %lu, frame_endoff: %lu\n",
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(unsigned long)frame_off, (unsigned long)frame_endoff);
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write_ptr += frame_endoff;
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}
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if ((readl_relaxed(drvdata->base + ETB_STATUS_REG)
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& ETB_STATUS_RAM_FULL) == 0) {
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writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
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} else {
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writel_relaxed(write_ptr, drvdata->base + ETB_RAM_READ_POINTER);
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lost = true;
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}
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depth = drvdata->buffer_depth;
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buf_ptr = drvdata->buf;
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for (i = 0; i < depth; i++) {
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read_data = readl_relaxed(drvdata->base +
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ETB_RAM_READ_DATA_REG);
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*(u32 *)buf_ptr = read_data;
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buf_ptr += 4;
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}
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if (lost)
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coresight_insert_barrier_packet(drvdata->buf);
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if (frame_off) {
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buf_ptr -= (frame_endoff * 4);
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for (i = 0; i < frame_endoff; i++) {
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*buf_ptr++ = 0x0;
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*buf_ptr++ = 0x0;
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*buf_ptr++ = 0x0;
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*buf_ptr++ = 0x0;
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}
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}
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writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
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CS_LOCK(drvdata->base);
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}
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static void etb_disable_hw(struct etb_drvdata *drvdata)
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{
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__etb_disable_hw(drvdata);
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etb_dump_hw(drvdata);
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coresight_disclaim_device(drvdata->base);
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}
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static int etb_disable(struct coresight_device *csdev)
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{
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struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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unsigned long flags;
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (atomic_dec_return(csdev->refcnt)) {
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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return -EBUSY;
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}
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/* Complain if we (somehow) got out of sync */
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WARN_ON_ONCE(drvdata->mode == CS_MODE_DISABLED);
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etb_disable_hw(drvdata);
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/* Dissociate from monitored process. */
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drvdata->pid = -1;
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drvdata->mode = CS_MODE_DISABLED;
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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dev_dbg(&csdev->dev, "ETB disabled\n");
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return 0;
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}
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static void *etb_alloc_buffer(struct coresight_device *csdev,
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struct perf_event *event, void **pages,
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int nr_pages, bool overwrite)
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{
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int node;
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struct cs_buffers *buf;
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node = (event->cpu == -1) ? NUMA_NO_NODE : cpu_to_node(event->cpu);
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buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
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if (!buf)
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return NULL;
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buf->snapshot = overwrite;
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buf->nr_pages = nr_pages;
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buf->data_pages = pages;
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return buf;
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}
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static void etb_free_buffer(void *config)
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{
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struct cs_buffers *buf = config;
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kfree(buf);
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}
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static int etb_set_buffer(struct coresight_device *csdev,
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struct perf_output_handle *handle)
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{
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int ret = 0;
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unsigned long head;
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struct cs_buffers *buf = etm_perf_sink_config(handle);
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if (!buf)
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return -EINVAL;
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/* wrap head around to the amount of space we have */
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head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1);
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/* find the page to write to */
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buf->cur = head / PAGE_SIZE;
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/* and offset within that page */
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buf->offset = head % PAGE_SIZE;
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local_set(&buf->data_size, 0);
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return ret;
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}
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static unsigned long etb_update_buffer(struct coresight_device *csdev,
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struct perf_output_handle *handle,
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void *sink_config)
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{
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bool lost = false;
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int i, cur;
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u8 *buf_ptr;
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const u32 *barrier;
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u32 read_ptr, write_ptr, capacity;
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u32 status, read_data;
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unsigned long offset, to_read = 0, flags;
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struct cs_buffers *buf = sink_config;
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struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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if (!buf)
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return 0;
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capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS;
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spin_lock_irqsave(&drvdata->spinlock, flags);
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/* Don't do anything if another tracer is using this sink */
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if (atomic_read(csdev->refcnt) != 1)
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goto out;
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__etb_disable_hw(drvdata);
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CS_UNLOCK(drvdata->base);
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/* unit is in words, not bytes */
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read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
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write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
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/*
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* Entries should be aligned to the frame size. If they are not
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* go back to the last alignment point to give decoding tools a
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* chance to fix things.
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*/
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if (write_ptr % ETB_FRAME_SIZE_WORDS) {
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dev_err(&csdev->dev,
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"write_ptr: %lu not aligned to formatter frame size\n",
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(unsigned long)write_ptr);
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write_ptr &= ~(ETB_FRAME_SIZE_WORDS - 1);
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lost = true;
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}
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/*
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* Get a hold of the status register and see if a wrap around
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* has occurred. If so adjust things accordingly. Otherwise
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* start at the beginning and go until the write pointer has
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* been reached.
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*/
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status = readl_relaxed(drvdata->base + ETB_STATUS_REG);
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if (status & ETB_STATUS_RAM_FULL) {
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lost = true;
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to_read = capacity;
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read_ptr = write_ptr;
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} else {
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to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->buffer_depth);
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to_read *= ETB_FRAME_SIZE_WORDS;
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}
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/*
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* Make sure we don't overwrite data that hasn't been consumed yet.
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* It is entirely possible that the HW buffer has more data than the
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* ring buffer can currently handle. If so adjust the start address
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* to take only the last traces.
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*
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* In snapshot mode we are looking to get the latest traces only and as
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* such, we don't care about not overwriting data that hasn't been
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* processed by user space.
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*/
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if (!buf->snapshot && to_read > handle->size) {
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u32 mask = ~(ETB_FRAME_SIZE_WORDS - 1);
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/* The new read pointer must be frame size aligned */
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to_read = handle->size & mask;
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/*
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* Move the RAM read pointer up, keeping in mind that
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* everything is in frame size units.
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*/
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read_ptr = (write_ptr + drvdata->buffer_depth) -
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to_read / ETB_FRAME_SIZE_WORDS;
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/* Wrap around if need be*/
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if (read_ptr > (drvdata->buffer_depth - 1))
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read_ptr -= drvdata->buffer_depth;
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/* let the decoder know we've skipped ahead */
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lost = true;
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}
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/*
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|
* Don't set the TRUNCATED flag in snapshot mode because 1) the
|
|
* captured buffer is expected to be truncated and 2) a full buffer
|
|
* prevents the event from being re-enabled by the perf core,
|
|
* resulting in stale data being send to user space.
|
|
*/
|
|
if (!buf->snapshot && lost)
|
|
perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
|
|
|
|
/* finally tell HW where we want to start reading from */
|
|
writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
|
|
|
|
cur = buf->cur;
|
|
offset = buf->offset;
|
|
barrier = barrier_pkt;
|
|
|
|
for (i = 0; i < to_read; i += 4) {
|
|
buf_ptr = buf->data_pages[cur] + offset;
|
|
read_data = readl_relaxed(drvdata->base +
|
|
ETB_RAM_READ_DATA_REG);
|
|
if (lost && i < CORESIGHT_BARRIER_PKT_SIZE) {
|
|
read_data = *barrier;
|
|
barrier++;
|
|
}
|
|
|
|
*(u32 *)buf_ptr = read_data;
|
|
buf_ptr += 4;
|
|
|
|
offset += 4;
|
|
if (offset >= PAGE_SIZE) {
|
|
offset = 0;
|
|
cur++;
|
|
/* wrap around at the end of the buffer */
|
|
cur &= buf->nr_pages - 1;
|
|
}
|
|
}
|
|
|
|
/* reset ETB buffer for next run */
|
|
writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
|
|
writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
|
|
|
|
/*
|
|
* In snapshot mode we simply increment the head by the number of byte
|
|
* that were written. User space function cs_etm_find_snapshot() will
|
|
* figure out how many bytes to get from the AUX buffer based on the
|
|
* position of the head.
|
|
*/
|
|
if (buf->snapshot)
|
|
handle->head += to_read;
|
|
|
|
__etb_enable_hw(drvdata);
|
|
CS_LOCK(drvdata->base);
|
|
out:
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
|
|
return to_read;
|
|
}
|
|
|
|
static const struct coresight_ops_sink etb_sink_ops = {
|
|
.enable = etb_enable,
|
|
.disable = etb_disable,
|
|
.alloc_buffer = etb_alloc_buffer,
|
|
.free_buffer = etb_free_buffer,
|
|
.update_buffer = etb_update_buffer,
|
|
};
|
|
|
|
static const struct coresight_ops etb_cs_ops = {
|
|
.sink_ops = &etb_sink_ops,
|
|
};
|
|
|
|
static void etb_dump(struct etb_drvdata *drvdata)
|
|
{
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&drvdata->spinlock, flags);
|
|
if (drvdata->mode == CS_MODE_SYSFS) {
|
|
__etb_disable_hw(drvdata);
|
|
etb_dump_hw(drvdata);
|
|
__etb_enable_hw(drvdata);
|
|
}
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
|
|
dev_dbg(&drvdata->csdev->dev, "ETB dumped\n");
|
|
}
|
|
|
|
static int etb_open(struct inode *inode, struct file *file)
|
|
{
|
|
struct etb_drvdata *drvdata = container_of(file->private_data,
|
|
struct etb_drvdata, miscdev);
|
|
|
|
if (local_cmpxchg(&drvdata->reading, 0, 1))
|
|
return -EBUSY;
|
|
|
|
dev_dbg(&drvdata->csdev->dev, "%s: successfully opened\n", __func__);
|
|
return 0;
|
|
}
|
|
|
|
static ssize_t etb_read(struct file *file, char __user *data,
|
|
size_t len, loff_t *ppos)
|
|
{
|
|
u32 depth;
|
|
struct etb_drvdata *drvdata = container_of(file->private_data,
|
|
struct etb_drvdata, miscdev);
|
|
struct device *dev = &drvdata->csdev->dev;
|
|
|
|
etb_dump(drvdata);
|
|
|
|
depth = drvdata->buffer_depth;
|
|
if (*ppos + len > depth * 4)
|
|
len = depth * 4 - *ppos;
|
|
|
|
if (copy_to_user(data, drvdata->buf + *ppos, len)) {
|
|
dev_dbg(dev,
|
|
"%s: copy_to_user failed\n", __func__);
|
|
return -EFAULT;
|
|
}
|
|
|
|
*ppos += len;
|
|
|
|
dev_dbg(dev, "%s: %zu bytes copied, %d bytes left\n",
|
|
__func__, len, (int)(depth * 4 - *ppos));
|
|
return len;
|
|
}
|
|
|
|
static int etb_release(struct inode *inode, struct file *file)
|
|
{
|
|
struct etb_drvdata *drvdata = container_of(file->private_data,
|
|
struct etb_drvdata, miscdev);
|
|
local_set(&drvdata->reading, 0);
|
|
|
|
dev_dbg(&drvdata->csdev->dev, "%s: released\n", __func__);
|
|
return 0;
|
|
}
|
|
|
|
static const struct file_operations etb_fops = {
|
|
.owner = THIS_MODULE,
|
|
.open = etb_open,
|
|
.read = etb_read,
|
|
.release = etb_release,
|
|
.llseek = no_llseek,
|
|
};
|
|
|
|
#define coresight_etb10_reg(name, offset) \
|
|
coresight_simple_reg32(struct etb_drvdata, name, offset)
|
|
|
|
coresight_etb10_reg(rdp, ETB_RAM_DEPTH_REG);
|
|
coresight_etb10_reg(sts, ETB_STATUS_REG);
|
|
coresight_etb10_reg(rrp, ETB_RAM_READ_POINTER);
|
|
coresight_etb10_reg(rwp, ETB_RAM_WRITE_POINTER);
|
|
coresight_etb10_reg(trg, ETB_TRG);
|
|
coresight_etb10_reg(ctl, ETB_CTL_REG);
|
|
coresight_etb10_reg(ffsr, ETB_FFSR);
|
|
coresight_etb10_reg(ffcr, ETB_FFCR);
|
|
|
|
static struct attribute *coresight_etb_mgmt_attrs[] = {
|
|
&dev_attr_rdp.attr,
|
|
&dev_attr_sts.attr,
|
|
&dev_attr_rrp.attr,
|
|
&dev_attr_rwp.attr,
|
|
&dev_attr_trg.attr,
|
|
&dev_attr_ctl.attr,
|
|
&dev_attr_ffsr.attr,
|
|
&dev_attr_ffcr.attr,
|
|
NULL,
|
|
};
|
|
|
|
static ssize_t trigger_cntr_show(struct device *dev,
|
|
struct device_attribute *attr, char *buf)
|
|
{
|
|
struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
unsigned long val = drvdata->trigger_cntr;
|
|
|
|
return sprintf(buf, "%#lx\n", val);
|
|
}
|
|
|
|
static ssize_t trigger_cntr_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
int ret;
|
|
unsigned long val;
|
|
struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
ret = kstrtoul(buf, 16, &val);
|
|
if (ret)
|
|
return ret;
|
|
|
|
drvdata->trigger_cntr = val;
|
|
return size;
|
|
}
|
|
static DEVICE_ATTR_RW(trigger_cntr);
|
|
|
|
static struct attribute *coresight_etb_attrs[] = {
|
|
&dev_attr_trigger_cntr.attr,
|
|
NULL,
|
|
};
|
|
|
|
static const struct attribute_group coresight_etb_group = {
|
|
.attrs = coresight_etb_attrs,
|
|
};
|
|
|
|
static const struct attribute_group coresight_etb_mgmt_group = {
|
|
.attrs = coresight_etb_mgmt_attrs,
|
|
.name = "mgmt",
|
|
};
|
|
|
|
static const struct attribute_group *coresight_etb_groups[] = {
|
|
&coresight_etb_group,
|
|
&coresight_etb_mgmt_group,
|
|
NULL,
|
|
};
|
|
|
|
static int etb_probe(struct amba_device *adev, const struct amba_id *id)
|
|
{
|
|
int ret;
|
|
void __iomem *base;
|
|
struct device *dev = &adev->dev;
|
|
struct coresight_platform_data *pdata = NULL;
|
|
struct etb_drvdata *drvdata;
|
|
struct resource *res = &adev->res;
|
|
struct coresight_desc desc = { 0 };
|
|
|
|
desc.name = coresight_alloc_device_name(&etb_devs, dev);
|
|
if (!desc.name)
|
|
return -ENOMEM;
|
|
|
|
drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
|
|
if (!drvdata)
|
|
return -ENOMEM;
|
|
|
|
drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
|
|
if (!IS_ERR(drvdata->atclk)) {
|
|
ret = clk_prepare_enable(drvdata->atclk);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
dev_set_drvdata(dev, drvdata);
|
|
|
|
/* validity for the resource is already checked by the AMBA core */
|
|
base = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(base))
|
|
return PTR_ERR(base);
|
|
|
|
drvdata->base = base;
|
|
|
|
spin_lock_init(&drvdata->spinlock);
|
|
|
|
drvdata->buffer_depth = etb_get_buffer_depth(drvdata);
|
|
|
|
if (drvdata->buffer_depth & 0x80000000)
|
|
return -EINVAL;
|
|
|
|
drvdata->buf = devm_kcalloc(dev,
|
|
drvdata->buffer_depth, 4, GFP_KERNEL);
|
|
if (!drvdata->buf)
|
|
return -ENOMEM;
|
|
|
|
/* This device is not associated with a session */
|
|
drvdata->pid = -1;
|
|
|
|
pdata = coresight_get_platform_data(dev);
|
|
if (IS_ERR(pdata))
|
|
return PTR_ERR(pdata);
|
|
adev->dev.platform_data = pdata;
|
|
|
|
desc.type = CORESIGHT_DEV_TYPE_SINK;
|
|
desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
|
|
desc.ops = &etb_cs_ops;
|
|
desc.pdata = pdata;
|
|
desc.dev = dev;
|
|
desc.groups = coresight_etb_groups;
|
|
drvdata->csdev = coresight_register(&desc);
|
|
if (IS_ERR(drvdata->csdev))
|
|
return PTR_ERR(drvdata->csdev);
|
|
|
|
drvdata->miscdev.name = desc.name;
|
|
drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
|
|
drvdata->miscdev.fops = &etb_fops;
|
|
ret = misc_register(&drvdata->miscdev);
|
|
if (ret)
|
|
goto err_misc_register;
|
|
|
|
pm_runtime_put(&adev->dev);
|
|
return 0;
|
|
|
|
err_misc_register:
|
|
coresight_unregister(drvdata->csdev);
|
|
return ret;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int etb_runtime_suspend(struct device *dev)
|
|
{
|
|
struct etb_drvdata *drvdata = dev_get_drvdata(dev);
|
|
|
|
if (drvdata && !IS_ERR(drvdata->atclk))
|
|
clk_disable_unprepare(drvdata->atclk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int etb_runtime_resume(struct device *dev)
|
|
{
|
|
struct etb_drvdata *drvdata = dev_get_drvdata(dev);
|
|
|
|
if (drvdata && !IS_ERR(drvdata->atclk))
|
|
clk_prepare_enable(drvdata->atclk);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static const struct dev_pm_ops etb_dev_pm_ops = {
|
|
SET_RUNTIME_PM_OPS(etb_runtime_suspend, etb_runtime_resume, NULL)
|
|
};
|
|
|
|
static const struct amba_id etb_ids[] = {
|
|
{
|
|
.id = 0x000bb907,
|
|
.mask = 0x000fffff,
|
|
},
|
|
{ 0, 0},
|
|
};
|
|
|
|
static struct amba_driver etb_driver = {
|
|
.drv = {
|
|
.name = "coresight-etb10",
|
|
.owner = THIS_MODULE,
|
|
.pm = &etb_dev_pm_ops,
|
|
.suppress_bind_attrs = true,
|
|
|
|
},
|
|
.probe = etb_probe,
|
|
.id_table = etb_ids,
|
|
};
|
|
builtin_amba_driver(etb_driver);
|