310 lines
7.1 KiB
C
310 lines
7.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
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*/
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#include <linux/export.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/platform_device.h>
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#include <linux/clk-provider.h>
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#include <linux/reset-controller.h>
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#include <linux/of.h>
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#include "common.h"
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#include "clk-rcg.h"
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#include "clk-regmap.h"
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#include "reset.h"
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#include "gdsc.h"
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struct qcom_cc {
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struct qcom_reset_controller reset;
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struct clk_regmap **rclks;
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size_t num_rclks;
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};
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const
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struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, unsigned long rate)
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{
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if (!f)
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return NULL;
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for (; f->freq; f++)
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if (rate <= f->freq)
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return f;
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/* Default to our fastest rate */
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return f - 1;
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}
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EXPORT_SYMBOL_GPL(qcom_find_freq);
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const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,
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unsigned long rate)
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{
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const struct freq_tbl *best = NULL;
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for ( ; f->freq; f++) {
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if (rate >= f->freq)
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best = f;
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else
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break;
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}
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return best;
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}
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EXPORT_SYMBOL_GPL(qcom_find_freq_floor);
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int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map, u8 src)
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{
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int i, num_parents = clk_hw_get_num_parents(hw);
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for (i = 0; i < num_parents; i++)
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if (src == map[i].src)
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return i;
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return -ENOENT;
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}
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EXPORT_SYMBOL_GPL(qcom_find_src_index);
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struct regmap *
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qcom_cc_map(struct platform_device *pdev, const struct qcom_cc_desc *desc)
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{
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void __iomem *base;
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struct resource *res;
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struct device *dev = &pdev->dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(dev, res);
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if (IS_ERR(base))
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return ERR_CAST(base);
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return devm_regmap_init_mmio(dev, base, desc->config);
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}
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EXPORT_SYMBOL_GPL(qcom_cc_map);
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void
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qcom_pll_set_fsm_mode(struct regmap *map, u32 reg, u8 bias_count, u8 lock_count)
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{
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u32 val;
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u32 mask;
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/* De-assert reset to FSM */
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regmap_update_bits(map, reg, PLL_VOTE_FSM_RESET, 0);
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/* Program bias count and lock count */
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val = bias_count << PLL_BIAS_COUNT_SHIFT |
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lock_count << PLL_LOCK_COUNT_SHIFT;
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mask = PLL_BIAS_COUNT_MASK << PLL_BIAS_COUNT_SHIFT;
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mask |= PLL_LOCK_COUNT_MASK << PLL_LOCK_COUNT_SHIFT;
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regmap_update_bits(map, reg, mask, val);
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/* Enable PLL FSM voting */
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regmap_update_bits(map, reg, PLL_VOTE_FSM_ENA, PLL_VOTE_FSM_ENA);
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}
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EXPORT_SYMBOL_GPL(qcom_pll_set_fsm_mode);
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static void qcom_cc_gdsc_unregister(void *data)
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{
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gdsc_unregister(data);
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}
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/*
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* Backwards compatibility with old DTs. Register a pass-through factor 1/1
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* clock to translate 'path' clk into 'name' clk and register the 'path'
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* clk as a fixed rate clock if it isn't present.
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*/
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static int _qcom_cc_register_board_clk(struct device *dev, const char *path,
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const char *name, unsigned long rate,
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bool add_factor)
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{
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struct device_node *node = NULL;
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struct device_node *clocks_node;
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struct clk_fixed_factor *factor;
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struct clk_fixed_rate *fixed;
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struct clk_init_data init_data = { };
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int ret;
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clocks_node = of_find_node_by_path("/clocks");
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if (clocks_node) {
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node = of_get_child_by_name(clocks_node, path);
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of_node_put(clocks_node);
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}
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if (!node) {
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fixed = devm_kzalloc(dev, sizeof(*fixed), GFP_KERNEL);
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if (!fixed)
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return -EINVAL;
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fixed->fixed_rate = rate;
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fixed->hw.init = &init_data;
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init_data.name = path;
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init_data.ops = &clk_fixed_rate_ops;
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ret = devm_clk_hw_register(dev, &fixed->hw);
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if (ret)
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return ret;
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}
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of_node_put(node);
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if (add_factor) {
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factor = devm_kzalloc(dev, sizeof(*factor), GFP_KERNEL);
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if (!factor)
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return -EINVAL;
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factor->mult = factor->div = 1;
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factor->hw.init = &init_data;
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init_data.name = name;
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init_data.parent_names = &path;
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init_data.num_parents = 1;
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init_data.flags = 0;
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init_data.ops = &clk_fixed_factor_ops;
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ret = devm_clk_hw_register(dev, &factor->hw);
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if (ret)
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return ret;
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}
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return 0;
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}
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int qcom_cc_register_board_clk(struct device *dev, const char *path,
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const char *name, unsigned long rate)
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{
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bool add_factor = true;
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/*
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* TODO: The RPM clock driver currently does not support the xo clock.
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* When xo is added to the RPM clock driver, we should change this
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* function to skip registration of xo factor clocks.
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*/
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return _qcom_cc_register_board_clk(dev, path, name, rate, add_factor);
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}
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EXPORT_SYMBOL_GPL(qcom_cc_register_board_clk);
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int qcom_cc_register_sleep_clk(struct device *dev)
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{
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return _qcom_cc_register_board_clk(dev, "sleep_clk", "sleep_clk_src",
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32768, true);
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}
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EXPORT_SYMBOL_GPL(qcom_cc_register_sleep_clk);
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/* Drop 'protected-clocks' from the list of clocks to register */
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static void qcom_cc_drop_protected(struct device *dev, struct qcom_cc *cc)
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{
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struct device_node *np = dev->of_node;
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struct property *prop;
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const __be32 *p;
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u32 i;
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of_property_for_each_u32(np, "protected-clocks", prop, p, i) {
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if (i >= cc->num_rclks)
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continue;
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cc->rclks[i] = NULL;
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}
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}
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static struct clk_hw *qcom_cc_clk_hw_get(struct of_phandle_args *clkspec,
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void *data)
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{
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struct qcom_cc *cc = data;
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unsigned int idx = clkspec->args[0];
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if (idx >= cc->num_rclks) {
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pr_err("%s: invalid index %u\n", __func__, idx);
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return ERR_PTR(-EINVAL);
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}
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return cc->rclks[idx] ? &cc->rclks[idx]->hw : ERR_PTR(-ENOENT);
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}
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int qcom_cc_really_probe(struct platform_device *pdev,
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const struct qcom_cc_desc *desc, struct regmap *regmap)
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{
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int i, ret;
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struct device *dev = &pdev->dev;
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struct qcom_reset_controller *reset;
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struct qcom_cc *cc;
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struct gdsc_desc *scd;
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size_t num_clks = desc->num_clks;
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struct clk_regmap **rclks = desc->clks;
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size_t num_clk_hws = desc->num_clk_hws;
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struct clk_hw **clk_hws = desc->clk_hws;
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cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
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if (!cc)
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return -ENOMEM;
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reset = &cc->reset;
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reset->rcdev.of_node = dev->of_node;
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reset->rcdev.ops = &qcom_reset_ops;
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reset->rcdev.owner = dev->driver->owner;
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reset->rcdev.nr_resets = desc->num_resets;
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reset->regmap = regmap;
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reset->reset_map = desc->resets;
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ret = devm_reset_controller_register(dev, &reset->rcdev);
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if (ret)
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return ret;
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if (desc->gdscs && desc->num_gdscs) {
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scd = devm_kzalloc(dev, sizeof(*scd), GFP_KERNEL);
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if (!scd)
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return -ENOMEM;
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scd->dev = dev;
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scd->scs = desc->gdscs;
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scd->num = desc->num_gdscs;
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ret = gdsc_register(scd, &reset->rcdev, regmap);
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if (ret)
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return ret;
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ret = devm_add_action_or_reset(dev, qcom_cc_gdsc_unregister,
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scd);
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if (ret)
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return ret;
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}
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cc->rclks = rclks;
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cc->num_rclks = num_clks;
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qcom_cc_drop_protected(dev, cc);
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for (i = 0; i < num_clk_hws; i++) {
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ret = devm_clk_hw_register(dev, clk_hws[i]);
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if (ret)
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return ret;
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}
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for (i = 0; i < num_clks; i++) {
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if (!rclks[i])
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continue;
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ret = devm_clk_register_regmap(dev, rclks[i]);
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if (ret)
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return ret;
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}
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ret = devm_of_clk_add_hw_provider(dev, qcom_cc_clk_hw_get, cc);
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if (ret)
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return ret;
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return 0;
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}
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EXPORT_SYMBOL_GPL(qcom_cc_really_probe);
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int qcom_cc_probe(struct platform_device *pdev, const struct qcom_cc_desc *desc)
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{
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struct regmap *regmap;
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regmap = qcom_cc_map(pdev, desc);
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if (IS_ERR(regmap))
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return PTR_ERR(regmap);
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return qcom_cc_really_probe(pdev, desc, regmap);
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}
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EXPORT_SYMBOL_GPL(qcom_cc_probe);
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MODULE_LICENSE("GPL v2");
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