691 lines
17 KiB
C
691 lines
17 KiB
C
#include <linux/device.h>
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#include <linux/cpu.h>
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#include <linux/smp.h>
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#include <linux/percpu.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/export.h>
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#include <linux/nodemask.h>
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#include <linux/cpumask.h>
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#include <linux/notifier.h>
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#include <asm/current.h>
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#include <asm/processor.h>
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#include <asm/cputable.h>
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#include <asm/hvcall.h>
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#include <asm/prom.h>
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#include <asm/machdep.h>
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#include <asm/smp.h>
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#include <asm/pmc.h>
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#include <asm/firmware.h>
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#include "cacheinfo.h"
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#ifdef CONFIG_PPC64
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#include <asm/paca.h>
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#include <asm/lppaca.h>
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#endif
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static DEFINE_PER_CPU(struct cpu, cpu_devices);
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/*
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* SMT snooze delay stuff, 64-bit only for now
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*/
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#ifdef CONFIG_PPC64
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/* Time in microseconds we delay before sleeping in the idle loop */
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DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
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static ssize_t store_smt_snooze_delay(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t count)
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{
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struct cpu *cpu = container_of(dev, struct cpu, dev);
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ssize_t ret;
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long snooze;
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ret = sscanf(buf, "%ld", &snooze);
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if (ret != 1)
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return -EINVAL;
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per_cpu(smt_snooze_delay, cpu->dev.id) = snooze;
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update_smt_snooze_delay(cpu->dev.id, snooze);
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return count;
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}
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static ssize_t show_smt_snooze_delay(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct cpu *cpu = container_of(dev, struct cpu, dev);
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return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->dev.id));
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}
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static DEVICE_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
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store_smt_snooze_delay);
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static int __init setup_smt_snooze_delay(char *str)
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{
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unsigned int cpu;
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long snooze;
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if (!cpu_has_feature(CPU_FTR_SMT))
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return 1;
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snooze = simple_strtol(str, NULL, 10);
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for_each_possible_cpu(cpu)
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per_cpu(smt_snooze_delay, cpu) = snooze;
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return 1;
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}
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__setup("smt-snooze-delay=", setup_smt_snooze_delay);
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#endif /* CONFIG_PPC64 */
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/*
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* Enabling PMCs will slow partition context switch times so we only do
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* it the first time we write to the PMCs.
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*/
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static DEFINE_PER_CPU(char, pmcs_enabled);
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void ppc_enable_pmcs(void)
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{
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ppc_set_pmu_inuse(1);
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/* Only need to enable them once */
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if (__get_cpu_var(pmcs_enabled))
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return;
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__get_cpu_var(pmcs_enabled) = 1;
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if (ppc_md.enable_pmcs)
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ppc_md.enable_pmcs();
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}
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EXPORT_SYMBOL(ppc_enable_pmcs);
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#define SYSFS_PMCSETUP(NAME, ADDRESS) \
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static void read_##NAME(void *val) \
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{ \
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*(unsigned long *)val = mfspr(ADDRESS); \
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} \
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static void write_##NAME(void *val) \
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{ \
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ppc_enable_pmcs(); \
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mtspr(ADDRESS, *(unsigned long *)val); \
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} \
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static ssize_t show_##NAME(struct device *dev, \
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struct device_attribute *attr, \
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char *buf) \
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{ \
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struct cpu *cpu = container_of(dev, struct cpu, dev); \
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unsigned long val; \
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smp_call_function_single(cpu->dev.id, read_##NAME, &val, 1); \
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return sprintf(buf, "%lx\n", val); \
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} \
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static ssize_t __used \
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store_##NAME(struct device *dev, struct device_attribute *attr, \
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const char *buf, size_t count) \
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{ \
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struct cpu *cpu = container_of(dev, struct cpu, dev); \
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unsigned long val; \
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int ret = sscanf(buf, "%lx", &val); \
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if (ret != 1) \
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return -EINVAL; \
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smp_call_function_single(cpu->dev.id, write_##NAME, &val, 1); \
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return count; \
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}
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/* Let's define all possible registers, we'll only hook up the ones
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* that are implemented on the current processor
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*/
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#if defined(CONFIG_PPC64)
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#define HAS_PPC_PMC_CLASSIC 1
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#define HAS_PPC_PMC_IBM 1
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#define HAS_PPC_PMC_PA6T 1
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#elif defined(CONFIG_6xx)
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#define HAS_PPC_PMC_CLASSIC 1
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#define HAS_PPC_PMC_IBM 1
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#define HAS_PPC_PMC_G4 1
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#endif
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#ifdef HAS_PPC_PMC_CLASSIC
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SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
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SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
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SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
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SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
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SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
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SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
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SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
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SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
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#ifdef HAS_PPC_PMC_G4
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SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
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#endif
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#ifdef CONFIG_PPC64
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SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
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SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
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SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
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SYSFS_PMCSETUP(purr, SPRN_PURR);
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SYSFS_PMCSETUP(spurr, SPRN_SPURR);
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SYSFS_PMCSETUP(dscr, SPRN_DSCR);
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SYSFS_PMCSETUP(pir, SPRN_PIR);
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/*
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Lets only enable read for phyp resources and
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enable write when needed with a separate function.
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Lets be conservative and default to pseries.
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*/
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static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
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static DEVICE_ATTR(spurr, 0400, show_spurr, NULL);
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static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
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static DEVICE_ATTR(purr, 0400, show_purr, store_purr);
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static DEVICE_ATTR(pir, 0400, show_pir, NULL);
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unsigned long dscr_default = 0;
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EXPORT_SYMBOL(dscr_default);
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static void add_write_permission_dev_attr(struct device_attribute *attr)
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{
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attr->attr.mode |= 0200;
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}
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static ssize_t show_dscr_default(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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return sprintf(buf, "%lx\n", dscr_default);
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}
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static void update_dscr(void *dummy)
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{
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if (!current->thread.dscr_inherit) {
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current->thread.dscr = dscr_default;
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mtspr(SPRN_DSCR, dscr_default);
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}
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}
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static ssize_t __used store_dscr_default(struct device *dev,
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struct device_attribute *attr, const char *buf,
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size_t count)
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{
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unsigned long val;
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int ret = 0;
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ret = sscanf(buf, "%lx", &val);
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if (ret != 1)
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return -EINVAL;
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dscr_default = val;
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on_each_cpu(update_dscr, NULL, 1);
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return count;
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}
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static DEVICE_ATTR(dscr_default, 0600,
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show_dscr_default, store_dscr_default);
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static void sysfs_create_dscr_default(void)
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{
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int err = 0;
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if (cpu_has_feature(CPU_FTR_DSCR))
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err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
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}
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#endif /* CONFIG_PPC64 */
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#ifdef HAS_PPC_PMC_PA6T
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SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
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SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
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SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
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SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
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SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
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SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
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#ifdef CONFIG_DEBUG_KERNEL
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SYSFS_PMCSETUP(hid0, SPRN_HID0);
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SYSFS_PMCSETUP(hid1, SPRN_HID1);
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SYSFS_PMCSETUP(hid4, SPRN_HID4);
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SYSFS_PMCSETUP(hid5, SPRN_HID5);
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SYSFS_PMCSETUP(ima0, SPRN_PA6T_IMA0);
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SYSFS_PMCSETUP(ima1, SPRN_PA6T_IMA1);
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SYSFS_PMCSETUP(ima2, SPRN_PA6T_IMA2);
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SYSFS_PMCSETUP(ima3, SPRN_PA6T_IMA3);
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SYSFS_PMCSETUP(ima4, SPRN_PA6T_IMA4);
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SYSFS_PMCSETUP(ima5, SPRN_PA6T_IMA5);
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SYSFS_PMCSETUP(ima6, SPRN_PA6T_IMA6);
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SYSFS_PMCSETUP(ima7, SPRN_PA6T_IMA7);
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SYSFS_PMCSETUP(ima8, SPRN_PA6T_IMA8);
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SYSFS_PMCSETUP(ima9, SPRN_PA6T_IMA9);
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SYSFS_PMCSETUP(imaat, SPRN_PA6T_IMAAT);
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SYSFS_PMCSETUP(btcr, SPRN_PA6T_BTCR);
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SYSFS_PMCSETUP(pccr, SPRN_PA6T_PCCR);
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SYSFS_PMCSETUP(rpccr, SPRN_PA6T_RPCCR);
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SYSFS_PMCSETUP(der, SPRN_PA6T_DER);
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SYSFS_PMCSETUP(mer, SPRN_PA6T_MER);
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SYSFS_PMCSETUP(ber, SPRN_PA6T_BER);
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SYSFS_PMCSETUP(ier, SPRN_PA6T_IER);
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SYSFS_PMCSETUP(sier, SPRN_PA6T_SIER);
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SYSFS_PMCSETUP(siar, SPRN_PA6T_SIAR);
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SYSFS_PMCSETUP(tsr0, SPRN_PA6T_TSR0);
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SYSFS_PMCSETUP(tsr1, SPRN_PA6T_TSR1);
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SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2);
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SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
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#endif /* CONFIG_DEBUG_KERNEL */
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#endif /* HAS_PPC_PMC_PA6T */
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#ifdef HAS_PPC_PMC_IBM
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static struct device_attribute ibm_common_attrs[] = {
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__ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
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__ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
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};
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#endif /* HAS_PPC_PMC_G4 */
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#ifdef HAS_PPC_PMC_G4
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static struct device_attribute g4_common_attrs[] = {
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__ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
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__ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
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__ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
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};
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#endif /* HAS_PPC_PMC_G4 */
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static struct device_attribute classic_pmc_attrs[] = {
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__ATTR(pmc1, 0600, show_pmc1, store_pmc1),
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__ATTR(pmc2, 0600, show_pmc2, store_pmc2),
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__ATTR(pmc3, 0600, show_pmc3, store_pmc3),
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__ATTR(pmc4, 0600, show_pmc4, store_pmc4),
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__ATTR(pmc5, 0600, show_pmc5, store_pmc5),
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__ATTR(pmc6, 0600, show_pmc6, store_pmc6),
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#ifdef CONFIG_PPC64
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__ATTR(pmc7, 0600, show_pmc7, store_pmc7),
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__ATTR(pmc8, 0600, show_pmc8, store_pmc8),
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#endif
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};
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#ifdef HAS_PPC_PMC_PA6T
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static struct device_attribute pa6t_attrs[] = {
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__ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
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__ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
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__ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
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__ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
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__ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
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__ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
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__ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
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__ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
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#ifdef CONFIG_DEBUG_KERNEL
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__ATTR(hid0, 0600, show_hid0, store_hid0),
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__ATTR(hid1, 0600, show_hid1, store_hid1),
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__ATTR(hid4, 0600, show_hid4, store_hid4),
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__ATTR(hid5, 0600, show_hid5, store_hid5),
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__ATTR(ima0, 0600, show_ima0, store_ima0),
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__ATTR(ima1, 0600, show_ima1, store_ima1),
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__ATTR(ima2, 0600, show_ima2, store_ima2),
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__ATTR(ima3, 0600, show_ima3, store_ima3),
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__ATTR(ima4, 0600, show_ima4, store_ima4),
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__ATTR(ima5, 0600, show_ima5, store_ima5),
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__ATTR(ima6, 0600, show_ima6, store_ima6),
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__ATTR(ima7, 0600, show_ima7, store_ima7),
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__ATTR(ima8, 0600, show_ima8, store_ima8),
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__ATTR(ima9, 0600, show_ima9, store_ima9),
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__ATTR(imaat, 0600, show_imaat, store_imaat),
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__ATTR(btcr, 0600, show_btcr, store_btcr),
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__ATTR(pccr, 0600, show_pccr, store_pccr),
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__ATTR(rpccr, 0600, show_rpccr, store_rpccr),
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__ATTR(der, 0600, show_der, store_der),
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__ATTR(mer, 0600, show_mer, store_mer),
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__ATTR(ber, 0600, show_ber, store_ber),
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__ATTR(ier, 0600, show_ier, store_ier),
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__ATTR(sier, 0600, show_sier, store_sier),
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__ATTR(siar, 0600, show_siar, store_siar),
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__ATTR(tsr0, 0600, show_tsr0, store_tsr0),
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__ATTR(tsr1, 0600, show_tsr1, store_tsr1),
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__ATTR(tsr2, 0600, show_tsr2, store_tsr2),
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__ATTR(tsr3, 0600, show_tsr3, store_tsr3),
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#endif /* CONFIG_DEBUG_KERNEL */
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};
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#endif /* HAS_PPC_PMC_PA6T */
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#endif /* HAS_PPC_PMC_CLASSIC */
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static void register_cpu_online(unsigned int cpu)
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{
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struct cpu *c = &per_cpu(cpu_devices, cpu);
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struct device *s = &c->dev;
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struct device_attribute *attrs, *pmc_attrs;
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int i, nattrs;
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#ifdef CONFIG_PPC64
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if (cpu_has_feature(CPU_FTR_SMT))
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device_create_file(s, &dev_attr_smt_snooze_delay);
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#endif
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/* PMC stuff */
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switch (cur_cpu_spec->pmc_type) {
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#ifdef HAS_PPC_PMC_IBM
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case PPC_PMC_IBM:
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attrs = ibm_common_attrs;
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nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
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pmc_attrs = classic_pmc_attrs;
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break;
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#endif /* HAS_PPC_PMC_IBM */
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#ifdef HAS_PPC_PMC_G4
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case PPC_PMC_G4:
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attrs = g4_common_attrs;
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nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
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pmc_attrs = classic_pmc_attrs;
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break;
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#endif /* HAS_PPC_PMC_G4 */
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#ifdef HAS_PPC_PMC_PA6T
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case PPC_PMC_PA6T:
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/* PA Semi starts counting at PMC0 */
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attrs = pa6t_attrs;
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nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
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pmc_attrs = NULL;
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break;
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#endif /* HAS_PPC_PMC_PA6T */
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default:
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attrs = NULL;
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nattrs = 0;
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pmc_attrs = NULL;
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}
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for (i = 0; i < nattrs; i++)
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device_create_file(s, &attrs[i]);
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if (pmc_attrs)
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for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
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device_create_file(s, &pmc_attrs[i]);
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#ifdef CONFIG_PPC64
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if (cpu_has_feature(CPU_FTR_MMCRA))
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device_create_file(s, &dev_attr_mmcra);
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if (cpu_has_feature(CPU_FTR_PURR)) {
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if (!firmware_has_feature(FW_FEATURE_LPAR))
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add_write_permission_dev_attr(&dev_attr_purr);
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device_create_file(s, &dev_attr_purr);
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}
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if (cpu_has_feature(CPU_FTR_SPURR))
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device_create_file(s, &dev_attr_spurr);
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if (cpu_has_feature(CPU_FTR_DSCR))
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device_create_file(s, &dev_attr_dscr);
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if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
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device_create_file(s, &dev_attr_pir);
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#endif /* CONFIG_PPC64 */
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cacheinfo_cpu_online(cpu);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static void unregister_cpu_online(unsigned int cpu)
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{
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struct cpu *c = &per_cpu(cpu_devices, cpu);
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struct device *s = &c->dev;
|
|
struct device_attribute *attrs, *pmc_attrs;
|
|
int i, nattrs;
|
|
|
|
BUG_ON(!c->hotpluggable);
|
|
|
|
#ifdef CONFIG_PPC64
|
|
if (cpu_has_feature(CPU_FTR_SMT))
|
|
device_remove_file(s, &dev_attr_smt_snooze_delay);
|
|
#endif
|
|
|
|
/* PMC stuff */
|
|
switch (cur_cpu_spec->pmc_type) {
|
|
#ifdef HAS_PPC_PMC_IBM
|
|
case PPC_PMC_IBM:
|
|
attrs = ibm_common_attrs;
|
|
nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
|
|
pmc_attrs = classic_pmc_attrs;
|
|
break;
|
|
#endif /* HAS_PPC_PMC_IBM */
|
|
#ifdef HAS_PPC_PMC_G4
|
|
case PPC_PMC_G4:
|
|
attrs = g4_common_attrs;
|
|
nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
|
|
pmc_attrs = classic_pmc_attrs;
|
|
break;
|
|
#endif /* HAS_PPC_PMC_G4 */
|
|
#ifdef HAS_PPC_PMC_PA6T
|
|
case PPC_PMC_PA6T:
|
|
/* PA Semi starts counting at PMC0 */
|
|
attrs = pa6t_attrs;
|
|
nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
|
|
pmc_attrs = NULL;
|
|
break;
|
|
#endif /* HAS_PPC_PMC_PA6T */
|
|
default:
|
|
attrs = NULL;
|
|
nattrs = 0;
|
|
pmc_attrs = NULL;
|
|
}
|
|
|
|
for (i = 0; i < nattrs; i++)
|
|
device_remove_file(s, &attrs[i]);
|
|
|
|
if (pmc_attrs)
|
|
for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
|
|
device_remove_file(s, &pmc_attrs[i]);
|
|
|
|
#ifdef CONFIG_PPC64
|
|
if (cpu_has_feature(CPU_FTR_MMCRA))
|
|
device_remove_file(s, &dev_attr_mmcra);
|
|
|
|
if (cpu_has_feature(CPU_FTR_PURR))
|
|
device_remove_file(s, &dev_attr_purr);
|
|
|
|
if (cpu_has_feature(CPU_FTR_SPURR))
|
|
device_remove_file(s, &dev_attr_spurr);
|
|
|
|
if (cpu_has_feature(CPU_FTR_DSCR))
|
|
device_remove_file(s, &dev_attr_dscr);
|
|
|
|
if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
|
|
device_remove_file(s, &dev_attr_pir);
|
|
#endif /* CONFIG_PPC64 */
|
|
|
|
cacheinfo_cpu_offline(cpu);
|
|
}
|
|
|
|
#ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
|
|
ssize_t arch_cpu_probe(const char *buf, size_t count)
|
|
{
|
|
if (ppc_md.cpu_probe)
|
|
return ppc_md.cpu_probe(buf, count);
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
ssize_t arch_cpu_release(const char *buf, size_t count)
|
|
{
|
|
if (ppc_md.cpu_release)
|
|
return ppc_md.cpu_release(buf, count);
|
|
|
|
return -EINVAL;
|
|
}
|
|
#endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
|
|
|
|
#endif /* CONFIG_HOTPLUG_CPU */
|
|
|
|
static int sysfs_cpu_notify(struct notifier_block *self,
|
|
unsigned long action, void *hcpu)
|
|
{
|
|
unsigned int cpu = (unsigned int)(long)hcpu;
|
|
|
|
switch (action) {
|
|
case CPU_ONLINE:
|
|
case CPU_ONLINE_FROZEN:
|
|
register_cpu_online(cpu);
|
|
break;
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
case CPU_DEAD:
|
|
case CPU_DEAD_FROZEN:
|
|
unregister_cpu_online(cpu);
|
|
break;
|
|
#endif
|
|
}
|
|
return NOTIFY_OK;
|
|
}
|
|
|
|
static struct notifier_block sysfs_cpu_nb = {
|
|
.notifier_call = sysfs_cpu_notify,
|
|
};
|
|
|
|
static DEFINE_MUTEX(cpu_mutex);
|
|
|
|
int cpu_add_dev_attr(struct device_attribute *attr)
|
|
{
|
|
int cpu;
|
|
|
|
mutex_lock(&cpu_mutex);
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
device_create_file(get_cpu_device(cpu), attr);
|
|
}
|
|
|
|
mutex_unlock(&cpu_mutex);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(cpu_add_dev_attr);
|
|
|
|
int cpu_add_dev_attr_group(struct attribute_group *attrs)
|
|
{
|
|
int cpu;
|
|
struct device *dev;
|
|
int ret;
|
|
|
|
mutex_lock(&cpu_mutex);
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
dev = get_cpu_device(cpu);
|
|
ret = sysfs_create_group(&dev->kobj, attrs);
|
|
WARN_ON(ret != 0);
|
|
}
|
|
|
|
mutex_unlock(&cpu_mutex);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(cpu_add_dev_attr_group);
|
|
|
|
|
|
void cpu_remove_dev_attr(struct device_attribute *attr)
|
|
{
|
|
int cpu;
|
|
|
|
mutex_lock(&cpu_mutex);
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
device_remove_file(get_cpu_device(cpu), attr);
|
|
}
|
|
|
|
mutex_unlock(&cpu_mutex);
|
|
}
|
|
EXPORT_SYMBOL_GPL(cpu_remove_dev_attr);
|
|
|
|
void cpu_remove_dev_attr_group(struct attribute_group *attrs)
|
|
{
|
|
int cpu;
|
|
struct device *dev;
|
|
|
|
mutex_lock(&cpu_mutex);
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
dev = get_cpu_device(cpu);
|
|
sysfs_remove_group(&dev->kobj, attrs);
|
|
}
|
|
|
|
mutex_unlock(&cpu_mutex);
|
|
}
|
|
EXPORT_SYMBOL_GPL(cpu_remove_dev_attr_group);
|
|
|
|
|
|
/* NUMA stuff */
|
|
|
|
#ifdef CONFIG_NUMA
|
|
static void register_nodes(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < MAX_NUMNODES; i++)
|
|
register_one_node(i);
|
|
}
|
|
|
|
int sysfs_add_device_to_node(struct device *dev, int nid)
|
|
{
|
|
struct node *node = node_devices[nid];
|
|
return sysfs_create_link(&node->dev.kobj, &dev->kobj,
|
|
kobject_name(&dev->kobj));
|
|
}
|
|
EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
|
|
|
|
void sysfs_remove_device_from_node(struct device *dev, int nid)
|
|
{
|
|
struct node *node = node_devices[nid];
|
|
sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
|
|
}
|
|
EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
|
|
|
|
#else
|
|
static void register_nodes(void)
|
|
{
|
|
return;
|
|
}
|
|
|
|
#endif
|
|
|
|
/* Only valid if CPU is present. */
|
|
static ssize_t show_physical_id(struct device *dev,
|
|
struct device_attribute *attr, char *buf)
|
|
{
|
|
struct cpu *cpu = container_of(dev, struct cpu, dev);
|
|
|
|
return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->dev.id));
|
|
}
|
|
static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
|
|
|
|
static int __init topology_init(void)
|
|
{
|
|
int cpu;
|
|
|
|
register_nodes();
|
|
register_cpu_notifier(&sysfs_cpu_nb);
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
struct cpu *c = &per_cpu(cpu_devices, cpu);
|
|
|
|
/*
|
|
* For now, we just see if the system supports making
|
|
* the RTAS calls for CPU hotplug. But, there may be a
|
|
* more comprehensive way to do this for an individual
|
|
* CPU. For instance, the boot cpu might never be valid
|
|
* for hotplugging.
|
|
*/
|
|
if (ppc_md.cpu_die)
|
|
c->hotpluggable = 1;
|
|
|
|
if (cpu_online(cpu) || c->hotpluggable) {
|
|
register_cpu(c, cpu);
|
|
|
|
device_create_file(&c->dev, &dev_attr_physical_id);
|
|
}
|
|
|
|
if (cpu_online(cpu))
|
|
register_cpu_online(cpu);
|
|
}
|
|
#ifdef CONFIG_PPC64
|
|
sysfs_create_dscr_default();
|
|
#endif /* CONFIG_PPC64 */
|
|
|
|
return 0;
|
|
}
|
|
subsys_initcall(topology_init);
|