125 lines
2.7 KiB
C
125 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* CBE Pervasive Monitor and Debug
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*
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* (C) Copyright IBM Corporation 2005
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*
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* Authors: Maximino Aguilar (maguilar@us.ibm.com)
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* Michael N. Day (mnday@us.ibm.com)
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*/
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#undef DEBUG
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/percpu.h>
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#include <linux/types.h>
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#include <linux/kallsyms.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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#include <asm/prom.h>
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#include <asm/pgtable.h>
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#include <asm/reg.h>
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#include <asm/cell-regs.h>
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#include <asm/cpu_has_feature.h>
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#include "pervasive.h"
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static void cbe_power_save(void)
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{
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unsigned long ctrl, thread_switch_control;
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/* Ensure our interrupt state is properly tracked */
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if (!prep_irq_for_idle())
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return;
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ctrl = mfspr(SPRN_CTRLF);
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/* Enable DEC and EE interrupt request */
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thread_switch_control = mfspr(SPRN_TSC_CELL);
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thread_switch_control |= TSC_CELL_EE_ENABLE | TSC_CELL_EE_BOOST;
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switch (ctrl & CTRL_CT) {
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case CTRL_CT0:
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thread_switch_control |= TSC_CELL_DEC_ENABLE_0;
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break;
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case CTRL_CT1:
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thread_switch_control |= TSC_CELL_DEC_ENABLE_1;
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break;
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default:
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printk(KERN_WARNING "%s: unknown configuration\n",
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__func__);
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break;
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}
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mtspr(SPRN_TSC_CELL, thread_switch_control);
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/*
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* go into low thread priority, medium priority will be
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* restored for us after wake-up.
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*/
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HMT_low();
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/*
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* atomically disable thread execution and runlatch.
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* External and Decrementer exceptions are still handled when the
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* thread is disabled but now enter in cbe_system_reset_exception()
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*/
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ctrl &= ~(CTRL_RUNLATCH | CTRL_TE);
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mtspr(SPRN_CTRLT, ctrl);
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/* Re-enable interrupts in MSR */
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__hard_irq_enable();
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}
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static int cbe_system_reset_exception(struct pt_regs *regs)
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{
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switch (regs->msr & SRR1_WAKEMASK) {
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case SRR1_WAKEDEC:
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set_dec(1);
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case SRR1_WAKEEE:
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/*
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* Handle these when interrupts get re-enabled and we take
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* them as regular exceptions. We are in an NMI context
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* and can't handle these here.
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*/
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break;
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case SRR1_WAKEMT:
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return cbe_sysreset_hack();
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#ifdef CONFIG_CBE_RAS
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case SRR1_WAKESYSERR:
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cbe_system_error_exception(regs);
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break;
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case SRR1_WAKETHERM:
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cbe_thermal_exception(regs);
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break;
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#endif /* CONFIG_CBE_RAS */
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default:
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/* do system reset */
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return 0;
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}
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/* everything handled */
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return 1;
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}
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void __init cbe_pervasive_init(void)
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{
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int cpu;
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if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO))
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return;
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for_each_possible_cpu(cpu) {
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struct cbe_pmd_regs __iomem *regs = cbe_get_cpu_pmd_regs(cpu);
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if (!regs)
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continue;
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/* Enable Pause(0) control bit */
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out_be64(®s->pmcr, in_be64(®s->pmcr) |
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CBE_PMD_PAUSE_ZERO_CONTROL);
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}
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ppc_md.power_save = cbe_power_save;
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ppc_md.system_reset_exception = cbe_system_reset_exception;
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}
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