181 lines
4.1 KiB
Plaintext
181 lines
4.1 KiB
Plaintext
/* The pxa3xx skeleton simply augments the 2xx version */
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#include "pxa2xx.dtsi"
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#include "dt-bindings/clock/pxa-clock.h"
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/ {
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model = "Marvell PXA27x familiy SoC";
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compatible = "marvell,pxa27x";
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pxabus {
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pdma: dma-controller@40000000 {
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compatible = "marvell,pdma-1.0";
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reg = <0x40000000 0x10000>;
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interrupts = <25>;
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#dma-channels = <32>;
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#dma-cells = <2>;
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#dma-requests = <75>;
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status = "okay";
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};
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pxairq: interrupt-controller@40d00000 {
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marvell,intc-priority;
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marvell,intc-nr-irqs = <34>;
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};
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pinctrl: pinctrl@40e00000 {
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reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
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0x40f00020 0x10>;
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compatible = "marvell,pxa27x-pinctrl";
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};
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gpio: gpio@40e00000 {
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compatible = "intel,pxa27x-gpio";
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gpio-ranges = <&pinctrl 0 0 128>;
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clocks = <&clks CLK_NONE>;
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};
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pxa27x_ohci: usb@4c000000 {
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compatible = "marvell,pxa-ohci";
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reg = <0x4c000000 0x10000>;
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interrupts = <3>;
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clocks = <&clks CLK_USBHOST>;
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status = "disabled";
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};
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pwm0: pwm@40b00000 {
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compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
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reg = <0x40b00000 0x10>;
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#pwm-cells = <1>;
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clocks = <&clks CLK_PWM0>;
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};
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pwm1: pwm@40b00010 {
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compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
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reg = <0x40b00010 0x10>;
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#pwm-cells = <1>;
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clocks = <&clks CLK_PWM1>;
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};
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pwm2: pwm@40c00000 {
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compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
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reg = <0x40c00000 0x10>;
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#pwm-cells = <1>;
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clocks = <&clks CLK_PWM0>;
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};
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pwm3: pwm@40c00010 {
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compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
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reg = <0x40c00010 0x10>;
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#pwm-cells = <1>;
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clocks = <&clks CLK_PWM1>;
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};
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pwri2c: i2c@40f000180 {
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compatible = "mrvl,pxa-i2c";
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reg = <0x40f00180 0x24>;
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interrupts = <6>;
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clocks = <&clks CLK_PWRI2C>;
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#address-cells = <0x1>;
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#size-cells = <0>;
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status = "disabled";
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};
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pxa27x_udc: udc@40600000 {
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compatible = "marvell,pxa270-udc";
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reg = <0x40600000 0x10000>;
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interrupts = <11>;
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clocks = <&clks CLK_USB>;
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status = "disabled";
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};
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keypad: keypad@41500000 {
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compatible = "marvell,pxa27x-keypad";
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reg = <0x41500000 0x4c>;
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interrupts = <4>;
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clocks = <&clks CLK_KEYPAD>;
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status = "disabled";
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};
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pxa_camera: imaging@50000000 {
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compatible = "marvell,pxa270-qci";
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reg = <0x50000000 0x1000>;
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interrupts = <33>;
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dmas = <&pdma 68 0 /* Y channel */
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&pdma 69 0 /* U channel */
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&pdma 70 0>; /* V channel */
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dma-names = "CI_Y", "CI_U", "CI_V";
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clocks = <&clks CLK_CAMERA>;
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clock-names = "ciclk";
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clock-frequency = <5000000>;
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clock-output-names = "qci_mclk";
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status = "disabled";
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};
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};
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clocks {
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/*
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* The muxing of external clocks/internal dividers for osc* clock
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* sources has been hidden under the carpet by now.
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*/
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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clks: pxa2xx_clks@41300004 {
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compatible = "marvell,pxa270-clocks";
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#clock-cells = <1>;
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status = "okay";
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};
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};
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timer@40a00000 {
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compatible = "marvell,pxa-timer";
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reg = <0x40a00000 0x20>;
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interrupts = <26>;
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clocks = <&clks CLK_OSTIMER>;
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status = "okay";
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};
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pxa270_opp_table: opp_table0 {
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compatible = "operating-points-v2";
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opp@104000000 {
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opp-hz = /bits/ 64 <104000000>;
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opp-microvolt = <900000 900000 1705000>;
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clock-latency-ns = <20>;
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};
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opp@156000000 {
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opp-hz = /bits/ 64 <156000000>;
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opp-microvolt = <1000000 1000000 1705000>;
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clock-latency-ns = <20>;
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};
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opp@208000000 {
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opp-hz = /bits/ 64 <208000000>;
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opp-microvolt = <1180000 1180000 1705000>;
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clock-latency-ns = <20>;
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};
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opp@312000000 {
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opp-hz = /bits/ 64 <312000000>;
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opp-microvolt = <1250000 1250000 1705000>;
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clock-latency-ns = <20>;
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};
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opp@416000000 {
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opp-hz = /bits/ 64 <416000000>;
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opp-microvolt = <1350000 1350000 1705000>;
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clock-latency-ns = <20>;
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};
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opp@520000000 {
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opp-hz = /bits/ 64 <520000000>;
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opp-microvolt = <1450000 1450000 1705000>;
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clock-latency-ns = <20>;
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};
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opp@624000000 {
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opp-hz = /bits/ 64 <624000000>;
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opp-microvolt = <1550000 1550000 1705000>;
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clock-latency-ns = <20>;
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};
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};
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};
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