170 lines
4.5 KiB
C
170 lines
4.5 KiB
C
/*
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* Copyright (c) 2002-2010, Intel Corporation.
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* Copyright (c) 2014 ATRON electronic GmbH
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* Author: Jan Safrata <jan.nikitenko@gmail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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#include <linux/delay.h>
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#include <linux/i2c-algo-bit.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/types.h>
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#include "psb_drv.h"
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#include "psb_intel_reg.h"
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/*
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* LPC GPIO based I2C bus for LVDS of Atom E6xx
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*/
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/*-----------------------------------------------------------------------------
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* LPC Register Offsets. Used for LVDS GPIO Bit Bashing. Registers are part
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* Atom E6xx [D31:F0]
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----------------------------------------------------------------------------*/
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#define RGEN 0x20
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#define RGIO 0x24
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#define RGLVL 0x28
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#define RGTPE 0x2C
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#define RGTNE 0x30
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#define RGGPE 0x34
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#define RGSMI 0x38
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#define RGTS 0x3C
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/* The LVDS GPIO clock lines are GPIOSUS[3]
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* The LVDS GPIO data lines are GPIOSUS[4]
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*/
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#define GPIO_CLOCK 0x08
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#define GPIO_DATA 0x10
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#define LPC_READ_REG(chan, r) inl((chan)->reg + (r))
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#define LPC_WRITE_REG(chan, r, val) outl((val), (chan)->reg + (r))
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static int get_clock(void *data)
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{
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struct psb_intel_i2c_chan *chan = data;
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u32 val, tmp;
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val = LPC_READ_REG(chan, RGIO);
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val |= GPIO_CLOCK;
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LPC_WRITE_REG(chan, RGIO, val);
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tmp = LPC_READ_REG(chan, RGLVL);
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val = (LPC_READ_REG(chan, RGLVL) & GPIO_CLOCK) ? 1 : 0;
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return val;
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}
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static int get_data(void *data)
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{
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struct psb_intel_i2c_chan *chan = data;
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u32 val, tmp;
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val = LPC_READ_REG(chan, RGIO);
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val |= GPIO_DATA;
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LPC_WRITE_REG(chan, RGIO, val);
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tmp = LPC_READ_REG(chan, RGLVL);
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val = (LPC_READ_REG(chan, RGLVL) & GPIO_DATA) ? 1 : 0;
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return val;
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}
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static void set_clock(void *data, int state_high)
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{
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struct psb_intel_i2c_chan *chan = data;
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u32 val;
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if (state_high) {
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val = LPC_READ_REG(chan, RGIO);
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val |= GPIO_CLOCK;
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LPC_WRITE_REG(chan, RGIO, val);
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} else {
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val = LPC_READ_REG(chan, RGIO);
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val &= ~GPIO_CLOCK;
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LPC_WRITE_REG(chan, RGIO, val);
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val = LPC_READ_REG(chan, RGLVL);
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val &= ~GPIO_CLOCK;
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LPC_WRITE_REG(chan, RGLVL, val);
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}
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}
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static void set_data(void *data, int state_high)
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{
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struct psb_intel_i2c_chan *chan = data;
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u32 val;
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if (state_high) {
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val = LPC_READ_REG(chan, RGIO);
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val |= GPIO_DATA;
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LPC_WRITE_REG(chan, RGIO, val);
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} else {
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val = LPC_READ_REG(chan, RGIO);
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val &= ~GPIO_DATA;
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LPC_WRITE_REG(chan, RGIO, val);
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val = LPC_READ_REG(chan, RGLVL);
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val &= ~GPIO_DATA;
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LPC_WRITE_REG(chan, RGLVL, val);
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}
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}
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void oaktrail_lvds_i2c_init(struct drm_encoder *encoder)
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{
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struct drm_device *dev = encoder->dev;
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struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct psb_intel_i2c_chan *chan;
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chan = kzalloc(sizeof(struct psb_intel_i2c_chan), GFP_KERNEL);
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if (!chan)
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return;
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chan->drm_dev = dev;
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chan->reg = dev_priv->lpc_gpio_base;
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strncpy(chan->adapter.name, "gma500 LPC", I2C_NAME_SIZE - 1);
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chan->adapter.owner = THIS_MODULE;
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chan->adapter.algo_data = &chan->algo;
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chan->adapter.dev.parent = &dev->pdev->dev;
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chan->algo.setsda = set_data;
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chan->algo.setscl = set_clock;
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chan->algo.getsda = get_data;
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chan->algo.getscl = get_clock;
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chan->algo.udelay = 100;
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chan->algo.timeout = usecs_to_jiffies(2200);
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chan->algo.data = chan;
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i2c_set_adapdata(&chan->adapter, chan);
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set_data(chan, 1);
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set_clock(chan, 1);
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udelay(50);
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if (i2c_bit_add_bus(&chan->adapter)) {
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kfree(chan);
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return;
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}
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gma_encoder->ddc_bus = chan;
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}
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