OpenCloudOS-Kernel/drivers/gpu/drm/msm/adreno
Jordan Crouse 88b333b0ed drm/msm: Ensure that the hardware write pointer is valid
Currently the value written to CP_RB_WPTR is calculated on the fly as
(rb->next - rb->start). But as the code is designed rb->next is wrapped
before writing the commands so if a series of commands happened to
fit perfectly in the ringbuffer, rb->next would end up being equal to
rb->size / 4 and thus result in an out of bounds address to CP_RB_WPTR.

The easiest way to fix this is to mask WPTR when writing it to the
hardware; it makes the hardware happy and the rest of the ringbuffer
math appears to work and there isn't any point in upsetting anything.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
[squash in is_power_of_2() check]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-12-29 15:02:58 -05:00
..
a2xx.xml.h drm/msm: update generated headers 2016-11-28 15:14:10 -05:00
a3xx.xml.h drm/msm: update generated headers 2016-11-28 15:14:10 -05:00
a3xx_gpu.c drm/msm: Add adreno_gpu_write64() 2016-11-28 15:14:12 -05:00
a3xx_gpu.h drm/msm: update generated headers 2014-08-04 11:55:28 -04:00
a4xx.xml.h drm/msm: update generated headers 2016-11-28 15:14:10 -05:00
a4xx_gpu.c drm/msm: Add adreno_gpu_write64() 2016-11-28 15:14:12 -05:00
a4xx_gpu.h drm/msm: a4xx support for msm-drm 2014-11-16 14:27:40 -05:00
a5xx.xml.h drm/msm: update generated headers 2016-11-28 15:14:10 -05:00
a5xx_gpu.c drm/msm: gpu: Add support for the GPMU 2016-11-28 15:14:16 -05:00
a5xx_gpu.h drm/msm: gpu: Add support for the GPMU 2016-11-28 15:14:16 -05:00
a5xx_power.c drm/msm: gpu: Add support for the GPMU 2016-11-28 15:14:16 -05:00
adreno_common.xml.h drm/msm: update generated headers 2016-11-28 15:14:10 -05:00
adreno_device.c drm/msm: gpu: Add support for the GPMU 2016-11-28 15:14:16 -05:00
adreno_gpu.c drm/msm: Ensure that the hardware write pointer is valid 2016-12-29 15:02:58 -05:00
adreno_gpu.h drm/msm: gpu: Add support for the GPMU 2016-11-28 15:14:16 -05:00
adreno_pm4.xml.h drm/msm: update generated headers 2016-11-28 15:14:10 -05:00