OpenCloudOS-Kernel/drivers/clk/tegra
Dmitry Osipenko fa64023763 clk: tegra: pll: Improve PLLM enable-state detection
Power Management Controller (PMC) can override the PLLM clock settings,
including the enable-state. Although PMC could only act as a second level
gate, meaning that PLLM needs to be enabled by the Clock and Reset
Controller (CaR) anyways if we want it to be enabled. Hence, when PLLM is
overridden by PMC, it needs to be enabled by CaR and ungated by PMC in
order to be functional. Please note that this patch doesn't fix any known
problem, and thus, it's merely a minor improvement.

Link: https://lore.kernel.org/linux-arm-kernel/20191210120909.GA2703785@ulmo/T/
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20200709172057.13951-1-digetx@gmail.com
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-07-27 18:21:17 -07:00
..
Kconfig clk: tegra: Rename Tegra124 EMC clock source file 2020-05-12 22:48:41 +02:00
Makefile clk: tegra: Add custom CCLK implementation 2020-05-12 22:48:42 +02:00
clk-audio-sync.c
clk-bpmp.c
clk-dfll.c
clk-dfll.h
clk-divider.c
clk-id.h clk: tegra: Remove tegra_pmc_clk_init along with clk ids 2020-03-12 11:34:04 +01:00
clk-periph-fixed.c
clk-periph-gate.c
clk-periph.c
clk-pll-out.c
clk-pll.c clk: tegra: pll: Improve PLLM enable-state detection 2020-07-27 18:21:17 -07:00
clk-sdmmc-mux.c
clk-super.c
clk-tegra-audio.c
clk-tegra-fixed.c clk: tegra: Remove CLK_M_DIV fixed clocks 2020-03-12 11:33:32 +01:00
clk-tegra-periph.c
clk-tegra-super-cclk.c clk: tegra: cclk: Add helpers for handling PLLX rate changes 2020-05-12 22:48:43 +02:00
clk-tegra-super-gen4.c
clk-tegra20-emc.c
clk-tegra20.c clk: tegra20: Use custom CCLK implementation 2020-05-12 22:48:43 +02:00
clk-tegra30.c clk: tegra30: Use custom CCLK implementation 2020-05-12 22:48:43 +02:00
clk-tegra114.c clk: tegra: Remove audio clocks configuration from clock driver 2020-03-12 12:10:49 +01:00
clk-tegra124-dfll-fcpu.c
clk-tegra124-emc.c clk: tegra: Rename Tegra124 EMC clock source file 2020-05-12 22:48:41 +02:00
clk-tegra124.c clk: tegra: Fix initial rate for pll_a on Tegra124 2020-05-12 16:26:18 -07:00
clk-tegra210-emc.c clk: tegra: Implement Tegra210 EMC clock 2020-05-12 22:48:42 +02:00
clk-tegra210.c clk: tegra: Add Tegra210 CSI TPG clock gate 2020-05-12 22:48:43 +02:00
clk-utils.c
clk.c
clk.h clk: tegra: cclk: Add helpers for handling PLLX rate changes 2020-05-12 22:48:43 +02:00
cvb.c
cvb.h