648 lines
16 KiB
C
648 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* PTP 1588 clock for Freescale QorIQ 1588 timer
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*
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* Copyright (C) 2010 OMICRON electronics GmbH
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/device.h>
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#include <linux/hrtimer.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/timex.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/fsl/ptp_qoriq.h>
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/*
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* Register access functions
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*/
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/* Caller must hold ptp_qoriq->lock. */
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static u64 tmr_cnt_read(struct ptp_qoriq *ptp_qoriq)
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{
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struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
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u64 ns;
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u32 lo, hi;
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lo = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_l);
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hi = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_h);
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ns = ((u64) hi) << 32;
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ns |= lo;
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return ns;
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}
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/* Caller must hold ptp_qoriq->lock. */
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static void tmr_cnt_write(struct ptp_qoriq *ptp_qoriq, u64 ns)
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{
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struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
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u32 hi = ns >> 32;
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u32 lo = ns & 0xffffffff;
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ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_l, lo);
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ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_h, hi);
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}
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/* Caller must hold ptp_qoriq->lock. */
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static void set_alarm(struct ptp_qoriq *ptp_qoriq)
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{
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struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
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u64 ns;
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u32 lo, hi;
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ns = tmr_cnt_read(ptp_qoriq) + 1500000000ULL;
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ns = div_u64(ns, 1000000000UL) * 1000000000ULL;
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ns -= ptp_qoriq->tclk_period;
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hi = ns >> 32;
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lo = ns & 0xffffffff;
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ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_l, lo);
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ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_h, hi);
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}
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/* Caller must hold ptp_qoriq->lock. */
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static void set_fipers(struct ptp_qoriq *ptp_qoriq)
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{
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struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
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set_alarm(ptp_qoriq);
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ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
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ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
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}
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static int extts_clean_up(struct ptp_qoriq *ptp_qoriq, int index,
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bool update_event)
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{
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struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
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struct ptp_clock_event event;
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void __iomem *reg_etts_l;
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void __iomem *reg_etts_h;
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u32 valid, stat, lo, hi;
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switch (index) {
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case 0:
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valid = ETS1_VLD;
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reg_etts_l = ®s->etts_regs->tmr_etts1_l;
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reg_etts_h = ®s->etts_regs->tmr_etts1_h;
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break;
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case 1:
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valid = ETS2_VLD;
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reg_etts_l = ®s->etts_regs->tmr_etts2_l;
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reg_etts_h = ®s->etts_regs->tmr_etts2_h;
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break;
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default:
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return -EINVAL;
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}
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event.type = PTP_CLOCK_EXTTS;
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event.index = index;
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do {
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lo = ptp_qoriq->read(reg_etts_l);
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hi = ptp_qoriq->read(reg_etts_h);
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if (update_event) {
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event.timestamp = ((u64) hi) << 32;
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event.timestamp |= lo;
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ptp_clock_event(ptp_qoriq->clock, &event);
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}
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stat = ptp_qoriq->read(®s->ctrl_regs->tmr_stat);
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} while (ptp_qoriq->extts_fifo_support && (stat & valid));
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return 0;
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}
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/*
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* Interrupt service routine
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*/
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irqreturn_t ptp_qoriq_isr(int irq, void *priv)
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{
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struct ptp_qoriq *ptp_qoriq = priv;
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struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
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struct ptp_clock_event event;
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u64 ns;
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u32 ack = 0, lo, hi, mask, val, irqs;
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spin_lock(&ptp_qoriq->lock);
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val = ptp_qoriq->read(®s->ctrl_regs->tmr_tevent);
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mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
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spin_unlock(&ptp_qoriq->lock);
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irqs = val & mask;
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if (irqs & ETS1) {
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ack |= ETS1;
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extts_clean_up(ptp_qoriq, 0, true);
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}
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if (irqs & ETS2) {
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ack |= ETS2;
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extts_clean_up(ptp_qoriq, 1, true);
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}
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if (irqs & ALM2) {
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ack |= ALM2;
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if (ptp_qoriq->alarm_value) {
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event.type = PTP_CLOCK_ALARM;
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event.index = 0;
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event.timestamp = ptp_qoriq->alarm_value;
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ptp_clock_event(ptp_qoriq->clock, &event);
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}
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if (ptp_qoriq->alarm_interval) {
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ns = ptp_qoriq->alarm_value + ptp_qoriq->alarm_interval;
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hi = ns >> 32;
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lo = ns & 0xffffffff;
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ptp_qoriq->write(®s->alarm_regs->tmr_alarm2_l, lo);
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ptp_qoriq->write(®s->alarm_regs->tmr_alarm2_h, hi);
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ptp_qoriq->alarm_value = ns;
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} else {
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spin_lock(&ptp_qoriq->lock);
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mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
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mask &= ~ALM2EN;
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ptp_qoriq->write(®s->ctrl_regs->tmr_temask, mask);
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spin_unlock(&ptp_qoriq->lock);
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ptp_qoriq->alarm_value = 0;
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ptp_qoriq->alarm_interval = 0;
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}
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}
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if (irqs & PP1) {
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ack |= PP1;
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event.type = PTP_CLOCK_PPS;
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ptp_clock_event(ptp_qoriq->clock, &event);
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}
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if (ack) {
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ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, ack);
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return IRQ_HANDLED;
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} else
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return IRQ_NONE;
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}
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EXPORT_SYMBOL_GPL(ptp_qoriq_isr);
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/*
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* PTP clock operations
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*/
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int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
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{
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u64 adj, diff;
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u32 tmr_add;
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int neg_adj = 0;
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struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
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struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
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if (scaled_ppm < 0) {
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neg_adj = 1;
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scaled_ppm = -scaled_ppm;
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}
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tmr_add = ptp_qoriq->tmr_add;
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adj = tmr_add;
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/* calculate diff as adj*(scaled_ppm/65536)/1000000
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* and round() to the nearest integer
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*/
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adj *= scaled_ppm;
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diff = div_u64(adj, 8000000);
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diff = (diff >> 13) + ((diff >> 12) & 1);
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tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
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ptp_qoriq->write(®s->ctrl_regs->tmr_add, tmr_add);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ptp_qoriq_adjfine);
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int ptp_qoriq_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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s64 now;
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unsigned long flags;
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struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
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spin_lock_irqsave(&ptp_qoriq->lock, flags);
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now = tmr_cnt_read(ptp_qoriq);
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now += delta;
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tmr_cnt_write(ptp_qoriq, now);
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set_fipers(ptp_qoriq);
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spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ptp_qoriq_adjtime);
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int ptp_qoriq_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
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{
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u64 ns;
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unsigned long flags;
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struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
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spin_lock_irqsave(&ptp_qoriq->lock, flags);
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ns = tmr_cnt_read(ptp_qoriq);
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spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
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*ts = ns_to_timespec64(ns);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ptp_qoriq_gettime);
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int ptp_qoriq_settime(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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u64 ns;
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unsigned long flags;
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struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
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ns = timespec64_to_ns(ts);
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spin_lock_irqsave(&ptp_qoriq->lock, flags);
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tmr_cnt_write(ptp_qoriq, ns);
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set_fipers(ptp_qoriq);
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spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ptp_qoriq_settime);
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int ptp_qoriq_enable(struct ptp_clock_info *ptp,
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struct ptp_clock_request *rq, int on)
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{
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struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
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struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
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unsigned long flags;
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u32 bit, mask = 0;
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switch (rq->type) {
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case PTP_CLK_REQ_EXTTS:
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switch (rq->extts.index) {
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case 0:
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bit = ETS1EN;
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break;
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case 1:
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bit = ETS2EN;
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break;
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default:
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return -EINVAL;
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}
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if (on)
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extts_clean_up(ptp_qoriq, rq->extts.index, false);
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break;
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case PTP_CLK_REQ_PPS:
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bit = PP1EN;
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break;
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default:
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return -EOPNOTSUPP;
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}
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spin_lock_irqsave(&ptp_qoriq->lock, flags);
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mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
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if (on) {
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mask |= bit;
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ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, bit);
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} else {
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mask &= ~bit;
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}
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ptp_qoriq->write(®s->ctrl_regs->tmr_temask, mask);
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spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ptp_qoriq_enable);
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static const struct ptp_clock_info ptp_qoriq_caps = {
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.owner = THIS_MODULE,
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.name = "qoriq ptp clock",
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.max_adj = 512000,
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.n_alarm = 0,
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.n_ext_ts = N_EXT_TS,
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.n_per_out = 0,
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.n_pins = 0,
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.pps = 1,
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.adjfine = ptp_qoriq_adjfine,
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.adjtime = ptp_qoriq_adjtime,
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.gettime64 = ptp_qoriq_gettime,
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.settime64 = ptp_qoriq_settime,
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.enable = ptp_qoriq_enable,
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};
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/**
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* ptp_qoriq_nominal_freq - calculate nominal frequency according to
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* reference clock frequency
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*
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* @clk_src: reference clock frequency
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*
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* The nominal frequency is the desired clock frequency.
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* It should be less than the reference clock frequency.
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* It should be a factor of 1000MHz.
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*
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* Return the nominal frequency
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*/
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static u32 ptp_qoriq_nominal_freq(u32 clk_src)
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{
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u32 remainder = 0;
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clk_src /= 1000000;
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remainder = clk_src % 100;
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if (remainder) {
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clk_src -= remainder;
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clk_src += 100;
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}
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do {
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clk_src -= 100;
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} while (1000 % clk_src);
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return clk_src * 1000000;
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}
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/**
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* ptp_qoriq_auto_config - calculate a set of default configurations
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*
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* @ptp_qoriq: pointer to ptp_qoriq
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* @node: pointer to device_node
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*
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* If below dts properties are not provided, this function will be
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* called to calculate a set of default configurations for them.
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* "fsl,tclk-period"
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* "fsl,tmr-prsc"
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* "fsl,tmr-add"
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* "fsl,tmr-fiper1"
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* "fsl,tmr-fiper2"
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* "fsl,max-adj"
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*
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* Return 0 if success
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*/
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static int ptp_qoriq_auto_config(struct ptp_qoriq *ptp_qoriq,
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struct device_node *node)
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{
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struct clk *clk;
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u64 freq_comp;
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u64 max_adj;
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u32 nominal_freq;
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u32 remainder = 0;
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u32 clk_src = 0;
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ptp_qoriq->cksel = DEFAULT_CKSEL;
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clk = of_clk_get(node, 0);
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if (!IS_ERR(clk)) {
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clk_src = clk_get_rate(clk);
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clk_put(clk);
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}
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if (clk_src <= 100000000UL) {
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pr_err("error reference clock value, or lower than 100MHz\n");
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return -EINVAL;
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}
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nominal_freq = ptp_qoriq_nominal_freq(clk_src);
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if (!nominal_freq)
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return -EINVAL;
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ptp_qoriq->tclk_period = 1000000000UL / nominal_freq;
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ptp_qoriq->tmr_prsc = DEFAULT_TMR_PRSC;
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/* Calculate initial frequency compensation value for TMR_ADD register.
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* freq_comp = ceil(2^32 / freq_ratio)
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* freq_ratio = reference_clock_freq / nominal_freq
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*/
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freq_comp = ((u64)1 << 32) * nominal_freq;
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freq_comp = div_u64_rem(freq_comp, clk_src, &remainder);
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if (remainder)
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freq_comp++;
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ptp_qoriq->tmr_add = freq_comp;
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ptp_qoriq->tmr_fiper1 = DEFAULT_FIPER1_PERIOD - ptp_qoriq->tclk_period;
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ptp_qoriq->tmr_fiper2 = DEFAULT_FIPER2_PERIOD - ptp_qoriq->tclk_period;
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/* max_adj = 1000000000 * (freq_ratio - 1.0) - 1
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* freq_ratio = reference_clock_freq / nominal_freq
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*/
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max_adj = 1000000000ULL * (clk_src - nominal_freq);
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max_adj = div_u64(max_adj, nominal_freq) - 1;
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ptp_qoriq->caps.max_adj = max_adj;
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return 0;
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}
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int ptp_qoriq_init(struct ptp_qoriq *ptp_qoriq, void __iomem *base,
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const struct ptp_clock_info *caps)
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{
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struct device_node *node = ptp_qoriq->dev->of_node;
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struct ptp_qoriq_registers *regs;
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struct timespec64 now;
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unsigned long flags;
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u32 tmr_ctrl;
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if (!node)
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return -ENODEV;
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ptp_qoriq->base = base;
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ptp_qoriq->caps = *caps;
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if (of_property_read_u32(node, "fsl,cksel", &ptp_qoriq->cksel))
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ptp_qoriq->cksel = DEFAULT_CKSEL;
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if (of_property_read_bool(node, "fsl,extts-fifo"))
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ptp_qoriq->extts_fifo_support = true;
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else
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ptp_qoriq->extts_fifo_support = false;
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if (of_property_read_u32(node,
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"fsl,tclk-period", &ptp_qoriq->tclk_period) ||
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of_property_read_u32(node,
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"fsl,tmr-prsc", &ptp_qoriq->tmr_prsc) ||
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of_property_read_u32(node,
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"fsl,tmr-add", &ptp_qoriq->tmr_add) ||
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of_property_read_u32(node,
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"fsl,tmr-fiper1", &ptp_qoriq->tmr_fiper1) ||
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of_property_read_u32(node,
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"fsl,tmr-fiper2", &ptp_qoriq->tmr_fiper2) ||
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of_property_read_u32(node,
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"fsl,max-adj", &ptp_qoriq->caps.max_adj)) {
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pr_warn("device tree node missing required elements, try automatic configuration\n");
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if (ptp_qoriq_auto_config(ptp_qoriq, node))
|
|
return -ENODEV;
|
|
}
|
|
|
|
if (of_property_read_bool(node, "little-endian")) {
|
|
ptp_qoriq->read = qoriq_read_le;
|
|
ptp_qoriq->write = qoriq_write_le;
|
|
} else {
|
|
ptp_qoriq->read = qoriq_read_be;
|
|
ptp_qoriq->write = qoriq_write_be;
|
|
}
|
|
|
|
/* The eTSEC uses differnt memory map with DPAA/ENETC */
|
|
if (of_device_is_compatible(node, "fsl,etsec-ptp")) {
|
|
ptp_qoriq->regs.ctrl_regs = base + ETSEC_CTRL_REGS_OFFSET;
|
|
ptp_qoriq->regs.alarm_regs = base + ETSEC_ALARM_REGS_OFFSET;
|
|
ptp_qoriq->regs.fiper_regs = base + ETSEC_FIPER_REGS_OFFSET;
|
|
ptp_qoriq->regs.etts_regs = base + ETSEC_ETTS_REGS_OFFSET;
|
|
} else {
|
|
ptp_qoriq->regs.ctrl_regs = base + CTRL_REGS_OFFSET;
|
|
ptp_qoriq->regs.alarm_regs = base + ALARM_REGS_OFFSET;
|
|
ptp_qoriq->regs.fiper_regs = base + FIPER_REGS_OFFSET;
|
|
ptp_qoriq->regs.etts_regs = base + ETTS_REGS_OFFSET;
|
|
}
|
|
|
|
ktime_get_real_ts64(&now);
|
|
ptp_qoriq_settime(&ptp_qoriq->caps, &now);
|
|
|
|
tmr_ctrl =
|
|
(ptp_qoriq->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT |
|
|
(ptp_qoriq->cksel & CKSEL_MASK) << CKSEL_SHIFT;
|
|
|
|
spin_lock_init(&ptp_qoriq->lock);
|
|
spin_lock_irqsave(&ptp_qoriq->lock, flags);
|
|
|
|
regs = &ptp_qoriq->regs;
|
|
ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl);
|
|
ptp_qoriq->write(®s->ctrl_regs->tmr_add, ptp_qoriq->tmr_add);
|
|
ptp_qoriq->write(®s->ctrl_regs->tmr_prsc, ptp_qoriq->tmr_prsc);
|
|
ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
|
|
ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
|
|
set_alarm(ptp_qoriq);
|
|
ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl,
|
|
tmr_ctrl|FIPERST|RTPE|TE|FRD);
|
|
|
|
spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
|
|
|
|
ptp_qoriq->clock = ptp_clock_register(&ptp_qoriq->caps, ptp_qoriq->dev);
|
|
if (IS_ERR(ptp_qoriq->clock))
|
|
return PTR_ERR(ptp_qoriq->clock);
|
|
|
|
ptp_qoriq->phc_index = ptp_clock_index(ptp_qoriq->clock);
|
|
ptp_qoriq_create_debugfs(ptp_qoriq);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(ptp_qoriq_init);
|
|
|
|
void ptp_qoriq_free(struct ptp_qoriq *ptp_qoriq)
|
|
{
|
|
struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
|
|
|
|
ptp_qoriq->write(®s->ctrl_regs->tmr_temask, 0);
|
|
ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, 0);
|
|
|
|
ptp_qoriq_remove_debugfs(ptp_qoriq);
|
|
ptp_clock_unregister(ptp_qoriq->clock);
|
|
iounmap(ptp_qoriq->base);
|
|
free_irq(ptp_qoriq->irq, ptp_qoriq);
|
|
}
|
|
EXPORT_SYMBOL_GPL(ptp_qoriq_free);
|
|
|
|
static int ptp_qoriq_probe(struct platform_device *dev)
|
|
{
|
|
struct ptp_qoriq *ptp_qoriq;
|
|
int err = -ENOMEM;
|
|
void __iomem *base;
|
|
|
|
ptp_qoriq = kzalloc(sizeof(*ptp_qoriq), GFP_KERNEL);
|
|
if (!ptp_qoriq)
|
|
goto no_memory;
|
|
|
|
ptp_qoriq->dev = &dev->dev;
|
|
|
|
err = -ENODEV;
|
|
|
|
ptp_qoriq->irq = platform_get_irq(dev, 0);
|
|
if (ptp_qoriq->irq < 0) {
|
|
pr_err("irq not in device tree\n");
|
|
goto no_node;
|
|
}
|
|
if (request_irq(ptp_qoriq->irq, ptp_qoriq_isr, IRQF_SHARED,
|
|
DRIVER, ptp_qoriq)) {
|
|
pr_err("request_irq failed\n");
|
|
goto no_node;
|
|
}
|
|
|
|
ptp_qoriq->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
|
if (!ptp_qoriq->rsrc) {
|
|
pr_err("no resource\n");
|
|
goto no_resource;
|
|
}
|
|
if (request_resource(&iomem_resource, ptp_qoriq->rsrc)) {
|
|
pr_err("resource busy\n");
|
|
goto no_resource;
|
|
}
|
|
|
|
base = ioremap(ptp_qoriq->rsrc->start,
|
|
resource_size(ptp_qoriq->rsrc));
|
|
if (!base) {
|
|
pr_err("ioremap ptp registers failed\n");
|
|
goto no_ioremap;
|
|
}
|
|
|
|
err = ptp_qoriq_init(ptp_qoriq, base, &ptp_qoriq_caps);
|
|
if (err)
|
|
goto no_clock;
|
|
|
|
platform_set_drvdata(dev, ptp_qoriq);
|
|
return 0;
|
|
|
|
no_clock:
|
|
iounmap(ptp_qoriq->base);
|
|
no_ioremap:
|
|
release_resource(ptp_qoriq->rsrc);
|
|
no_resource:
|
|
free_irq(ptp_qoriq->irq, ptp_qoriq);
|
|
no_node:
|
|
kfree(ptp_qoriq);
|
|
no_memory:
|
|
return err;
|
|
}
|
|
|
|
static int ptp_qoriq_remove(struct platform_device *dev)
|
|
{
|
|
struct ptp_qoriq *ptp_qoriq = platform_get_drvdata(dev);
|
|
|
|
ptp_qoriq_free(ptp_qoriq);
|
|
release_resource(ptp_qoriq->rsrc);
|
|
kfree(ptp_qoriq);
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id match_table[] = {
|
|
{ .compatible = "fsl,etsec-ptp" },
|
|
{ .compatible = "fsl,fman-ptp-timer" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, match_table);
|
|
|
|
static struct platform_driver ptp_qoriq_driver = {
|
|
.driver = {
|
|
.name = "ptp_qoriq",
|
|
.of_match_table = match_table,
|
|
},
|
|
.probe = ptp_qoriq_probe,
|
|
.remove = ptp_qoriq_remove,
|
|
};
|
|
|
|
module_platform_driver(ptp_qoriq_driver);
|
|
|
|
MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
|
|
MODULE_DESCRIPTION("PTP clock for Freescale QorIQ 1588 timer");
|
|
MODULE_LICENSE("GPL");
|