0a8c290ac5
An issue has been reported where the PMIC either locks up or fails to respond following a system Reset. This could result in a second write in which the bus writes the current content of the write buffer to address of the last I2C access. The failure case is where this unwanted write transfers incorrect data to a critical register. This patch fixes this issue to by following any read or write with a dummy read to a safe register address. A safe register address is one where the contents will not affect the operation of the system. Signed-off-by: Ashish Jangam <ashish.jangam@kpitcummins.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> |
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| .. | ||
| da9052.h | ||
| pdata.h | ||
| reg.h | ||