286 lines
9.0 KiB
ArmAsm
286 lines
9.0 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* BLAKE2s digest algorithm, ARM scalar implementation
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*
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* Copyright 2020 Google LLC
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*
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* Author: Eric Biggers <ebiggers@google.com>
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*/
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#include <linux/linkage.h>
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// Registers used to hold message words temporarily. There aren't
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// enough ARM registers to hold the whole message block, so we have to
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// load the words on-demand.
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M_0 .req r12
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M_1 .req r14
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// The BLAKE2s initialization vector
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.Lblake2s_IV:
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.word 0x6A09E667, 0xBB67AE85, 0x3C6EF372, 0xA54FF53A
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.word 0x510E527F, 0x9B05688C, 0x1F83D9AB, 0x5BE0CD19
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.macro __ldrd a, b, src, offset
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#if __LINUX_ARM_ARCH__ >= 6
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ldrd \a, \b, [\src, #\offset]
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#else
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ldr \a, [\src, #\offset]
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ldr \b, [\src, #\offset + 4]
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#endif
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.endm
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.macro __strd a, b, dst, offset
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#if __LINUX_ARM_ARCH__ >= 6
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strd \a, \b, [\dst, #\offset]
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#else
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str \a, [\dst, #\offset]
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str \b, [\dst, #\offset + 4]
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#endif
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.endm
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// Execute a quarter-round of BLAKE2s by mixing two columns or two diagonals.
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// (a0, b0, c0, d0) and (a1, b1, c1, d1) give the registers containing the two
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// columns/diagonals. s0-s1 are the word offsets to the message words the first
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// column/diagonal needs, and likewise s2-s3 for the second column/diagonal.
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// M_0 and M_1 are free to use, and the message block can be found at sp + 32.
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//
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// Note that to save instructions, the rotations don't happen when the
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// pseudocode says they should, but rather they are delayed until the values are
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// used. See the comment above _blake2s_round().
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.macro _blake2s_quarterround a0, b0, c0, d0, a1, b1, c1, d1, s0, s1, s2, s3
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ldr M_0, [sp, #32 + 4 * \s0]
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ldr M_1, [sp, #32 + 4 * \s2]
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// a += b + m[blake2s_sigma[r][2*i + 0]];
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add \a0, \a0, \b0, ror #brot
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add \a1, \a1, \b1, ror #brot
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add \a0, \a0, M_0
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add \a1, \a1, M_1
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// d = ror32(d ^ a, 16);
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eor \d0, \a0, \d0, ror #drot
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eor \d1, \a1, \d1, ror #drot
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// c += d;
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add \c0, \c0, \d0, ror #16
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add \c1, \c1, \d1, ror #16
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// b = ror32(b ^ c, 12);
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eor \b0, \c0, \b0, ror #brot
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eor \b1, \c1, \b1, ror #brot
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ldr M_0, [sp, #32 + 4 * \s1]
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ldr M_1, [sp, #32 + 4 * \s3]
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// a += b + m[blake2s_sigma[r][2*i + 1]];
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add \a0, \a0, \b0, ror #12
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add \a1, \a1, \b1, ror #12
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add \a0, \a0, M_0
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add \a1, \a1, M_1
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// d = ror32(d ^ a, 8);
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eor \d0, \a0, \d0, ror#16
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eor \d1, \a1, \d1, ror#16
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// c += d;
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add \c0, \c0, \d0, ror#8
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add \c1, \c1, \d1, ror#8
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// b = ror32(b ^ c, 7);
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eor \b0, \c0, \b0, ror#12
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eor \b1, \c1, \b1, ror#12
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.endm
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// Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
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// are in r0..r9. The stack pointer points to 8 bytes of scratch space for
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// spilling v[8..9], then to v[9..15], then to the message block. r10-r12 and
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// r14 are free to use. The macro arguments s0-s15 give the order in which the
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// message words are used in this round.
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//
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// All rotates are performed using the implicit rotate operand accepted by the
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// 'add' and 'eor' instructions. This is faster than using explicit rotate
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// instructions. To make this work, we allow the values in the second and last
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// rows of the BLAKE2s state matrix (rows 'b' and 'd') to temporarily have the
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// wrong rotation amount. The rotation amount is then fixed up just in time
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// when the values are used. 'brot' is the number of bits the values in row 'b'
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// need to be rotated right to arrive at the correct values, and 'drot'
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// similarly for row 'd'. (brot, drot) start out as (0, 0) but we make it such
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// that they end up as (7, 8) after every round.
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.macro _blake2s_round s0, s1, s2, s3, s4, s5, s6, s7, \
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s8, s9, s10, s11, s12, s13, s14, s15
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// Mix first two columns:
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// (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]).
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__ldrd r10, r11, sp, 16 // load v[12] and v[13]
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_blake2s_quarterround r0, r4, r8, r10, r1, r5, r9, r11, \
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\s0, \s1, \s2, \s3
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__strd r8, r9, sp, 0
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__strd r10, r11, sp, 16
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// Mix second two columns:
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// (v[2], v[6], v[10], v[14]) and (v[3], v[7], v[11], v[15]).
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__ldrd r8, r9, sp, 8 // load v[10] and v[11]
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__ldrd r10, r11, sp, 24 // load v[14] and v[15]
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_blake2s_quarterround r2, r6, r8, r10, r3, r7, r9, r11, \
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\s4, \s5, \s6, \s7
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str r10, [sp, #24] // store v[14]
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// v[10], v[11], and v[15] are used below, so no need to store them yet.
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.set brot, 7
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.set drot, 8
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// Mix first two diagonals:
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// (v[0], v[5], v[10], v[15]) and (v[1], v[6], v[11], v[12]).
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ldr r10, [sp, #16] // load v[12]
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_blake2s_quarterround r0, r5, r8, r11, r1, r6, r9, r10, \
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\s8, \s9, \s10, \s11
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__strd r8, r9, sp, 8
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str r11, [sp, #28]
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str r10, [sp, #16]
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// Mix second two diagonals:
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// (v[2], v[7], v[8], v[13]) and (v[3], v[4], v[9], v[14]).
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__ldrd r8, r9, sp, 0 // load v[8] and v[9]
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__ldrd r10, r11, sp, 20 // load v[13] and v[14]
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_blake2s_quarterround r2, r7, r8, r10, r3, r4, r9, r11, \
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\s12, \s13, \s14, \s15
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__strd r10, r11, sp, 20
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.endm
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//
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// void blake2s_compress_arch(struct blake2s_state *state,
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// const u8 *block, size_t nblocks, u32 inc);
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//
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// Only the first three fields of struct blake2s_state are used:
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// u32 h[8]; (inout)
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// u32 t[2]; (inout)
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// u32 f[2]; (in)
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//
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.align 5
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ENTRY(blake2s_compress_arch)
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push {r0-r2,r4-r11,lr} // keep this an even number
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.Lnext_block:
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// r0 is 'state'
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// r1 is 'block'
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// r3 is 'inc'
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// Load and increment the counter t[0..1].
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__ldrd r10, r11, r0, 32
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adds r10, r10, r3
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adc r11, r11, #0
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__strd r10, r11, r0, 32
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// _blake2s_round is very short on registers, so copy the message block
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// to the stack to save a register during the rounds. This also has the
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// advantage that misalignment only needs to be dealt with in one place.
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sub sp, sp, #64
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mov r12, sp
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tst r1, #3
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bne .Lcopy_block_misaligned
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ldmia r1!, {r2-r9}
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stmia r12!, {r2-r9}
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ldmia r1!, {r2-r9}
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stmia r12, {r2-r9}
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.Lcopy_block_done:
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str r1, [sp, #68] // Update message pointer
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// Calculate v[8..15]. Push v[9..15] onto the stack, and leave space
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// for spilling v[8..9]. Leave v[8..9] in r8-r9.
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mov r14, r0 // r14 = state
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adr r12, .Lblake2s_IV
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ldmia r12!, {r8-r9} // load IV[0..1]
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__ldrd r0, r1, r14, 40 // load f[0..1]
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ldm r12, {r2-r7} // load IV[3..7]
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eor r4, r4, r10 // v[12] = IV[4] ^ t[0]
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eor r5, r5, r11 // v[13] = IV[5] ^ t[1]
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eor r6, r6, r0 // v[14] = IV[6] ^ f[0]
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eor r7, r7, r1 // v[15] = IV[7] ^ f[1]
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push {r2-r7} // push v[9..15]
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sub sp, sp, #8 // leave space for v[8..9]
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// Load h[0..7] == v[0..7].
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ldm r14, {r0-r7}
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// Execute the rounds. Each round is provided the order in which it
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// needs to use the message words.
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.set brot, 0
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.set drot, 0
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_blake2s_round 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
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_blake2s_round 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3
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_blake2s_round 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4
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_blake2s_round 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8
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_blake2s_round 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13
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_blake2s_round 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9
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_blake2s_round 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11
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_blake2s_round 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10
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_blake2s_round 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5
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_blake2s_round 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0
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// Fold the final state matrix into the hash chaining value:
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//
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// for (i = 0; i < 8; i++)
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// h[i] ^= v[i] ^ v[i + 8];
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//
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ldr r14, [sp, #96] // r14 = &h[0]
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add sp, sp, #8 // v[8..9] are already loaded.
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pop {r10-r11} // load v[10..11]
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eor r0, r0, r8
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eor r1, r1, r9
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eor r2, r2, r10
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eor r3, r3, r11
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ldm r14, {r8-r11} // load h[0..3]
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eor r0, r0, r8
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eor r1, r1, r9
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eor r2, r2, r10
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eor r3, r3, r11
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stmia r14!, {r0-r3} // store new h[0..3]
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ldm r14, {r0-r3} // load old h[4..7]
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pop {r8-r11} // load v[12..15]
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eor r0, r0, r4, ror #brot
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eor r1, r1, r5, ror #brot
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eor r2, r2, r6, ror #brot
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eor r3, r3, r7, ror #brot
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eor r0, r0, r8, ror #drot
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eor r1, r1, r9, ror #drot
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eor r2, r2, r10, ror #drot
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eor r3, r3, r11, ror #drot
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add sp, sp, #64 // skip copy of message block
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stm r14, {r0-r3} // store new h[4..7]
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// Advance to the next block, if there is one. Note that if there are
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// multiple blocks, then 'inc' (the counter increment amount) must be
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// 64. So we can simply set it to 64 without re-loading it.
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ldm sp, {r0, r1, r2} // load (state, block, nblocks)
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mov r3, #64 // set 'inc'
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subs r2, r2, #1 // nblocks--
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str r2, [sp, #8]
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bne .Lnext_block // nblocks != 0?
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pop {r0-r2,r4-r11,pc}
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// The next message block (pointed to by r1) isn't 4-byte aligned, so it
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// can't be loaded using ldmia. Copy it to the stack buffer (pointed to
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// by r12) using an alternative method. r2-r9 are free to use.
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.Lcopy_block_misaligned:
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mov r2, #64
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1:
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#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
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ldr r3, [r1], #4
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#else
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ldrb r3, [r1, #0]
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ldrb r4, [r1, #1]
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ldrb r5, [r1, #2]
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ldrb r6, [r1, #3]
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add r1, r1, #4
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orr r3, r3, r4, lsl #8
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orr r3, r3, r5, lsl #16
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orr r3, r3, r6, lsl #24
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#endif
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subs r2, r2, #4
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str r3, [r12], #4
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bne 1b
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b .Lcopy_block_done
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ENDPROC(blake2s_compress_arch)
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